Hydrogen silsesquioxane tri-dimensional advanced patterning concepts for high density of integration in sub-7 nm nodes

Recent developments in CMOS devices such as FinFET, FDSOI or stacked nanowire FETs (SNWFETs) have led the industry to consider increasingly complex integration processes while aiming at smaller and smaller devices. This paper proposes new concepts of device integration based on the use of hydrogen s...

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Main Authors: Gaben, L., Bossy, X., Arvet, C., Vizioz, C., Barnola, S., Perrot, C., Sturm, J., Exbrayat, Y., Loup, V., Besson, P., Perrin, B., Balan, V., Previtali, B., Samson, M.-P., Barraud, S., Monfray, S., Boeuf, F., Skotnicki, T., Balestra, F., Vinet, M., Euvrard, C., Pauliac, S., Dallery, J.-A., Bustos, J., Dechanoz, R., Hemard, B., Koscianski, L.
Format: Conference Proceeding
Language:English
Subjects:
3D lithography
FinFET
FinFETs
HSQ
Lithography
Logic gates
Metals
Silicon
SNWFET
Sociology
stacked nanowire FETs
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Summary:Recent developments in CMOS devices such as FinFET, FDSOI or stacked nanowire FETs (SNWFETs) have led the industry to consider increasingly complex integration processes while aiming at smaller and smaller devices. This paper proposes new concepts of device integration based on the use of hydrogen silsesquioxane (HSQ). Recently employed to replace polysilicon sacrificial gate in gate last processes, its use could also be extended for building the whole transistor level including device lateral insulation, multi-workfonction layouts, self-aligned contacts and possibly the first layer of metal interconnects. If several EUV masks could be employed for such a use, HSQ patterning once enhanced by multi-electron beam lithography, could allow to perform all these features within a single exposure step without involving any conventional etching or stripping steps.
ISSN:2472-9132
DOI:10.1109/ULIS.2017.7962617