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A 32 GHz 20 dBm-PSAT transformer-based Doherty power amplifier for multi-Gb/s 5G applications in 28 nm bulk CMOS
This paper presents a 32 GHz transformer-based Doherty power amplifier (PA) in a 28 nm bulk CMOS process. There are two techniques proposed: linearization by means of AM-PM and AM-AM compensation of the class AB and the class C amplifiers; and parallel-series-parallel power power combiner, wherein a...
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creator | Indirayanti, Paramartha Reynaert, Patrick |
description | This paper presents a 32 GHz transformer-based Doherty power amplifier (PA) in a 28 nm bulk CMOS process. There are two techniques proposed: linearization by means of AM-PM and AM-AM compensation of the class AB and the class C amplifiers; and parallel-series-parallel power power combiner, wherein a current-mode parallel combiner complements the Doherty's voltage-mode series combiner to boost the output power. A saturated output power (P SAT ) of 19.8 dBm and an OP1dB of 16 dBm are accomplished from 1V supply while supporting 15 Gb/s 64-QAM amplification at 11.7 dBm average output power. The chip achieves 21% PAE at P SAT and occupies 0.59 mm 2 active area. |
doi_str_mv | 10.1109/RFIC.2017.7969013 |
format | conference_proceeding |
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There are two techniques proposed: linearization by means of AM-PM and AM-AM compensation of the class AB and the class C amplifiers; and parallel-series-parallel power power combiner, wherein a current-mode parallel combiner complements the Doherty's voltage-mode series combiner to boost the output power. A saturated output power (P SAT ) of 19.8 dBm and an OP1dB of 16 dBm are accomplished from 1V supply while supporting 15 Gb/s 64-QAM amplification at 11.7 dBm average output power. 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There are two techniques proposed: linearization by means of AM-PM and AM-AM compensation of the class AB and the class C amplifiers; and parallel-series-parallel power power combiner, wherein a current-mode parallel combiner complements the Doherty's voltage-mode series combiner to boost the output power. A saturated output power (P SAT ) of 19.8 dBm and an OP1dB of 16 dBm are accomplished from 1V supply while supporting 15 Gb/s 64-QAM amplification at 11.7 dBm average output power. The chip achieves 21% PAE at P SAT and occupies 0.59 mm 2 active area.</description><subject>5G mobile communication</subject><subject>AM-PM distortion</subject><subject>Bandwidth</subject><subject>Circuit faults</subject><subject>CMOS</subject><subject>Distortion</subject><subject>Doherty power amplifier</subject><subject>Gain</subject><subject>Impedance</subject><subject>Power generation</subject><subject>transformer power combiner</subject><issn>2375-0995</issn><isbn>1509046267</isbn><isbn>9781509046263</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2017</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><recordid>eNotkM1KAzEcxKMg2FYfQLz8XyBtkt0kzXFd7bZQqdh6Ltkki9H9Itki9eldsKcZmN_MYRB6oGROKVGL99UmnzNC5VwqoQhNrtCUcqJIKpiQ12jCEskxUYrfommMX4QQSYWaoD6DhEGx_gVGwD41-G2fHWAIuo1VFxoXcKmjs_DcfbownKHvflwA3fS1r_zoRgiaUz14XJSLCLwA3Y-Z0YPv2gi-BbaEtoHyVH9D_rrb36GbStfR3V90hj5WL4d8jbe7YpNnW-yp5AO2qUwlrRgn1ilnLBdGWaOUqVIppHJC6SWtqCutMemIWUoFl0SXlow9myQz9Pi_651zxz74Rofz8fJO8gcnJVcz</recordid><startdate>201706</startdate><enddate>201706</enddate><creator>Indirayanti, Paramartha</creator><creator>Reynaert, Patrick</creator><general>IEEE</general><scope>6IE</scope><scope>6IH</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIO</scope></search><sort><creationdate>201706</creationdate><title>A 32 GHz 20 dBm-PSAT transformer-based Doherty power amplifier for multi-Gb/s 5G applications in 28 nm bulk CMOS</title><author>Indirayanti, Paramartha ; Reynaert, Patrick</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i175t-d47471f250de9ecd56c9dc99cf47679e69a81f1ebdcc4f25d116570abd0471d33</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2017</creationdate><topic>5G mobile communication</topic><topic>AM-PM distortion</topic><topic>Bandwidth</topic><topic>Circuit faults</topic><topic>CMOS</topic><topic>Distortion</topic><topic>Doherty power amplifier</topic><topic>Gain</topic><topic>Impedance</topic><topic>Power generation</topic><topic>transformer power combiner</topic><toplevel>online_resources</toplevel><creatorcontrib>Indirayanti, Paramartha</creatorcontrib><creatorcontrib>Reynaert, Patrick</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan (POP) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Xplore</collection><collection>IEEE Proceedings Order Plans (POP) 1998-present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Indirayanti, Paramartha</au><au>Reynaert, Patrick</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>A 32 GHz 20 dBm-PSAT transformer-based Doherty power amplifier for multi-Gb/s 5G applications in 28 nm bulk CMOS</atitle><btitle>2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)</btitle><stitle>RFIC</stitle><date>2017-06</date><risdate>2017</risdate><spage>45</spage><epage>48</epage><pages>45-48</pages><eissn>2375-0995</eissn><eisbn>1509046267</eisbn><eisbn>9781509046263</eisbn><abstract>This paper presents a 32 GHz transformer-based Doherty power amplifier (PA) in a 28 nm bulk CMOS process. There are two techniques proposed: linearization by means of AM-PM and AM-AM compensation of the class AB and the class C amplifiers; and parallel-series-parallel power power combiner, wherein a current-mode parallel combiner complements the Doherty's voltage-mode series combiner to boost the output power. A saturated output power (P SAT ) of 19.8 dBm and an OP1dB of 16 dBm are accomplished from 1V supply while supporting 15 Gb/s 64-QAM amplification at 11.7 dBm average output power. The chip achieves 21% PAE at P SAT and occupies 0.59 mm 2 active area.</abstract><pub>IEEE</pub><doi>10.1109/RFIC.2017.7969013</doi><tpages>4</tpages></addata></record> |
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ispartof | 2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 2017, p.45-48 |
issn | 2375-0995 |
language | eng |
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source | IEEE Xplore All Conference Series |
subjects | 5G mobile communication AM-PM distortion Bandwidth Circuit faults CMOS Distortion Doherty power amplifier Gain Impedance Power generation transformer power combiner |
title | A 32 GHz 20 dBm-PSAT transformer-based Doherty power amplifier for multi-Gb/s 5G applications in 28 nm bulk CMOS |
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