An 80-106 GHz CMOS amplifier with 0.5V supply voltage

A low-power CMOS W-band amplifier that feeds on a 0.5-V supply is presented. It achieves a peak gain of 24.1 dB and consumes 12mW. This was made possible by (a) the use of Mie Fujitsu Semiconductor 55-nm CMOS technology with deeply depleted channel (DDC) MOSFETs, which are meant specifically for ult...

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Bibliographic Details
Main Authors: Katayama, K., Amakawa, S., Takano, K., Yoshida, T., Fujishima, M., Hisamitsu, K., Takatsuka, H.
Format: Conference Proceeding
Language:English
Subjects:
CMOS technology
Feedback
Gain
gain-boosting
Layout
Logic gates
millimeter-wave
MOSFET
Noise measurement
Online Access:Request full text
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Summary:A low-power CMOS W-band amplifier that feeds on a 0.5-V supply is presented. It achieves a peak gain of 24.1 dB and consumes 12mW. This was made possible by (a) the use of Mie Fujitsu Semiconductor 55-nm CMOS technology with deeply depleted channel (DDC) MOSFETs, which are meant specifically for ultralow-power designs with sub-1V supply voltage, (b) high-f max transistor layout, which gives about 1 dB higher gain in the W-band than the ordinary layout, and (c) single-ended negative-capacitance feedback technique, which gives wideband gain boosting comparable to its differential counterpart (with cross-coupled feedback capacitors) with half the power consumption of the latter.
ISSN:2375-0995
DOI:10.1109/RFIC.2017.7969079