Dynamic Trade-off among Fault Tolerance, Energy Consumption, and Performance on a Multiple-Issue VLIW Processor

• Published in: IEEE transactions on multi-scale computing systems 2018-07, Vol.4 (3), p.327-339
• Main Authors: Sartor, Anderson L., Becker, Pedro H. E., Hoozemans, Joost, Wong, Stephan, Beck, Antonio C. S.
• Format: Article
• Language: English
• Subjects: Adaptive processor; Batteries; Energy consumption; Failure rates; Fault tolerance; Fault tolerant systems; Hardware; Microprocessors; Redundancy; Replicating; soft errors; Software; Thermal design; VLIW
• ISSN: 2332-7766; 2332-7766
• DOI: 10.1109/TMSCS.2017.2760299

In the design of modern-day processors, energy consumption and fault tolerance have gained significant importance next to performance. This is caused by battery constraints, thermal design limits, and higher susceptibility to errors as transistor feature sizes are decreasing. However, achieving the ideal balance among them is challenging due to their conflicting nature (e.g., fault-tolerance techniques usually influence execution time or increase energy consumption), and that is why current processor designs target at most two of these axes. Based on that, we propose a new VLIW-based processor design capable of adapting the execution of the application at run-time in a totally transparent fashion, considering performance, fault tolerance, and energy consumption altogether, in which the weight (priority) of each one can be defined a priori . This is achieved by a novel decision module that dynamically controls the application's ILP to increase the possibility of replicating instructions or applying power gating. For an energy-oriented configuration, it is possible, on average, to reduce energy consumption by 37.2 percent with an overhead of only 8.2 percent in performance, while maintaining low levels of failure rate, when compared to a fault-tolerant design.