Virtual white board: Leveraging investments in interface based design and executable specification

• Main Authors: Hiers, Todd, Chunhua Hu, Karguth, Brian, Fuoco, Chuck
• Format: Conference Proceeding
• Language: English
• Subjects: Clocks; design automation; Ecosystems; executable specification; Fabrics; Metadata; Servers; SoC; Software
• ISSN: 2164-1706
• DOI: 10.1109/SOCC.2017.8226037

Interface-based design methodologies and tools using machine-readable metadata have been in use for many years; however, a lot of manual effort is still needed to gather module information, especially when the SoC and modules are being co-designed. It is a time-consuming and error prone challenge made more difficult by increasing SoC complexity. Various efforts to address these issues with document-based "executable specifications" met with only modest success. By committing fully to an architecture-specific web-based executable specification tool, the metadata available in the ecosystem could be leveraged to greatly improve the specification-to-design process. This paper presents a case study on a unified, integrated environment for subsystem creation, SoC integration, and SoC specification teams by building and using an architecture-aware tool to comprehend the SoC constructs. A modern web-based framework instead of a standalone tool gave built-in collaboration capabilities and an easy way to visually represent and manipulate data. Various architectural rules about these connections can be enforced. Connection fabrics (e.g. NoC) and other project-specific infrastructure can be configured and synthesized on demand and brought in to the design easily due to the common environment. Netlists and other connectivity data can be fed into automated RTL generation processes directly, or used as reference for design teams tasked with implementation. Reports and automated software generation satisfy the needs of the design verification and software teams. Overall team productivity is greatly enhanced - infrastructure is produced much more quickly with fewer engineers needed. The shorter revision cycle also speeds and simplifies functional and performance testing feedback loops.