A Compressive Sensing-Based CMOS Image Sensor With Second-Order \Sigma \Delta ADCs

This paper presents a new analog-to-digital conversion scheme for a second-order ΣA incremental analog to digital converter (ADC) that can be employed in a compressive sensing (CS)-based CMOS image sensor (CIS) as a column-parallel ADC. The conversion scheme removes image distortion from a reconstru...

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Bibliographic Details
Published in:IEEE sensors journal 2018-03, Vol.18 (6), p.2404-2410
Main Authors: Lee, Hyunkeun, Seo, Donghwan, Kim, Woo-Tae, Lee, Byung-Geun
Format: Article
Language:English
Subjects:
A/D conversion scheme
Analog-digital conversion
Clocks
CMOS image sensor
CMOS image sensors
Compressed sensing
compressive sensing
image processing
Image reconstruction
Multiplexing
Sensors
ΣΔ incremental analog to digital converter
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Summary:This paper presents a new analog-to-digital conversion scheme for a second-order ΣA incremental analog to digital converter (ADC) that can be employed in a compressive sensing (CS)-based CMOS image sensor (CIS) as a column-parallel ADC. The conversion scheme removes image distortion from a reconstructed image by making the ADC output codes represent an average of the ADC inputs. In addition, a new multiplexing scheme implementing a compressive sensing matrix helps to reduce hardware complexity and control compression ratio without hardware modifications. A 160×160 pixel CS-based CIS fabricated in 0.11 μm CIS process successfully demonstrates the proposed schemes.
ISSN:1530-437X
1558-1748
DOI:10.1109/JSEN.2017.2787122