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High-k metal gate fundamental learning and multi-Vt options for stacked nanosheet gate-all-around transistor
In this paper, we report multi-threshold-voltage (multi-Vt) options for stacked Nanosheet gate-all-around (GAA) transistors. V t can be modulated through workfunction metal (WFM) thickness as well as the inter-nanosheet spacing (T sus ), the combination of which may be leveraged to increase the numb...
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| container_end_page | 22.1.4 |
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| creator | Jingyun Zhang Ando, Takashi Chun Wing Yeung Miaomiao Wang Ohseong Kwon Galatage, Rohit Chao, Robin Loubet, Nicolas Bum Ki Moon Ruqiang Bao Vega, Reinaldo A. Juntao Li Chen Zhang Zuoguang Liu Myunggil Kang Xin Miao Junli Wang Kanakasabapathy, Sivananda Basker, Veeraraghavan S. Jagannathan, Hemanth Yamashita, Tenko |
| description | In this paper, we report multi-threshold-voltage (multi-Vt) options for stacked Nanosheet gate-all-around (GAA) transistors. V t can be modulated through workfunction metal (WFM) thickness as well as the inter-nanosheet spacing (T sus ), the combination of which may be leveraged to increase the number of undoped V t offerings within a CMOS device menu relative to a FinFET CMOS device menu, which fundamentally does not have T sus as a V t tuning option. Hence we propose our multi-V t scheme by taking advantage of the unique structure of stacked GAA transistor. |
| doi_str_mv | 10.1109/IEDM.2017.8268438 |
| format | conference_proceeding |
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| fulltext | fulltext_linktorsrc |
| identifier | EISSN: 2156-017X |
| ispartof | 2017 IEEE International Electron Devices Meeting (IEDM), 2017, p.22.1.1-22.1.4 |
| issn | 2156-017X |
| language | eng |
| recordid | cdi_ieee_primary_8268438 |
| source | IEEE Xplore All Conference Series |
| subjects | FinFETs Gallium arsenide Logic gates Metals Modulation Sensitivity Silicon |
| title | High-k metal gate fundamental learning and multi-Vt options for stacked nanosheet gate-all-around transistor |
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