Threshold voltage hysteresis in SiC MOSFETs and its impact on circuit operation

Threshold voltage hysteresis in SiC power MOSFETs is rarely studied. This work investigates the capture- and emission-time constants of positive and negative charge trapped in the gate oxide and interface as a function of gate bias. We present a measurement technique which enables measurement of the...

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Bibliographic Details
Main Authors: Puschkarsky, Katja, Reisinger, Hans, Aichinger, Thomas, Gustin, Wolfgang, Grasser, Tibor
Format: Conference Proceeding
Language:English
Subjects:
Delays
Logic gates
Silicon carbide
Stress
Stress measurement
Temperature measurement
Voltage measurement
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Summary:Threshold voltage hysteresis in SiC power MOSFETs is rarely studied. This work investigates the capture- and emission-time constants of positive and negative charge trapped in the gate oxide and interface as a function of gate bias. We present a measurement technique which enables measurement of the real Vth during application-relevant bipolar AC gate stress. We show that threshold voltage hysteresis has no harmful effect on switching operation.
ISSN:2374-8036
DOI:10.1109/IIRW.2017.8361232