Retargeting of compiled simulators for digital signal processors using a machine description language

This paper presents a methodology to retarget the technique of compiled simulation for digital signal processors (DSPs) using the modeling language LISA. In the past, the principle of compiled simulation as means for speeding up simulators has only been implemented for specific DSP architectures. Th...

Full description

Saved in:
Bibliographic Details
Main Authors: Pees, S., Hoffmann, A., Meyr, H.
Format: Conference Proceeding
Language:English
Subjects:
Acceleration
Buildings
Computer architecture
Digital signal processing
Digital signal processing chips
Digital signal processors
Hardware design languages
Pipelines
Runtime
Software performance
Online Access:Request full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:This paper presents a methodology to retarget the technique of compiled simulation for digital signal processors (DSPs) using the modeling language LISA. In the past, the principle of compiled simulation as means for speeding up simulators has only been implemented for specific DSP architectures. The new approach presented here discusses methods of integrating compiled simulation techniques to retargetable simulation tools. The principle and the implementation are discussed in this paper and results for the TI TMS320C6201 DSP are presented.
DOI:10.1109/DATE.2000.840858