Proposal to solve workload problems in the simulator of the Wolf architecture

Presents an approach that has been proposed in order to investigate the workload balance problems in a simulator of the Wolf parallel architecture, known as Saw (Simulator of Architecture Wolf). This approach can be applied to the simulator in order to eliminate overloaded and underloaded units obse...

Full description

Saved in:
Bibliographic Details
Main Authors: Cavenaghi, M.A., Martini, J.A., Neto, A.G.
Format: Conference Proceeding
Language:English
Subjects:
Clocks
Computational modeling
Computer architecture
Computer science
Computer simulation
Delay
Hardware
Informatics
Object oriented modeling
Proposals
Online Access:Request full text
Tags: Add Tag
No Tags, Be the first to tag this record!
cited_by
cites
container_end_page 318 vol.1
container_issue
container_start_page 315
container_title
container_volume 1
creator Cavenaghi, M.A.
Martini, J.A.
Neto, A.G.
description Presents an approach that has been proposed in order to investigate the workload balance problems in a simulator of the Wolf parallel architecture, known as Saw (Simulator of Architecture Wolf). This approach can be applied to the simulator in order to eliminate overloaded and underloaded units observed during the first experiments on the Wolf architecture. The unexpected results obtained are well-understood if one considers that the architecture simulated is based on a circular pipeline: if there is only one overloaded (or underloaded) unit in the simulator, it can affect the performance of the entire system, adding latency to it. The first attempt to improve the results obtained with the simulator was to calibrate all of the simulator units. The approach used leads to the necessity of dividing the units into two categories: grouped units and isolated units. These two categories are analyzed separately, resulting in modifications to the original architecture.
doi_str_mv 10.1109/HPC.2000.846568
format conference_proceeding
fullrecord <record><control><sourceid>ieee_6IE</sourceid><recordid>TN_cdi_ieee_primary_846568</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>846568</ieee_id><sourcerecordid>846568</sourcerecordid><originalsourceid>FETCH-LOGICAL-i89t-7349c06e301fb6e3d0bf6bdfee2223cc322f7ad7f9f2503cc42e7d72f2f768b63</originalsourceid><addsrcrecordid>eNotj0FLwzAYhgMiKLNnwVP-QOuXpE2aoxR1wsQdBh5H2n5h0dSUJFP89xa30wPPCw-8hNwyqBgDfb_edhUHgKqtZSPbC1Jo1YKSuoFGg74iRUofy86UlBz0NXndxjCHZDzNgabgv5H-hPjpgxnpHEPvcUrUfdF8QJrcdPQmh0iD_RfvwVtq4nBwGYd8jHhDLq3xCYszV2T39Ljr1uXm7fmle9iUrtW5VKLWA0gUwGy_YITeyn60iJxzMQyCc6vMqKy2vIFF1BzVqLhdtGx7KVbk7pR1iLifo5tM_N2fLos_W-JNNw</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>Proposal to solve workload problems in the simulator of the Wolf architecture</title><source>IEEE Electronic Library (IEL) Conference Proceedings</source><creator>Cavenaghi, M.A. ; Martini, J.A. ; Neto, A.G.</creator><creatorcontrib>Cavenaghi, M.A. ; Martini, J.A. ; Neto, A.G.</creatorcontrib><description>Presents an approach that has been proposed in order to investigate the workload balance problems in a simulator of the Wolf parallel architecture, known as Saw (Simulator of Architecture Wolf). This approach can be applied to the simulator in order to eliminate overloaded and underloaded units observed during the first experiments on the Wolf architecture. The unexpected results obtained are well-understood if one considers that the architecture simulated is based on a circular pipeline: if there is only one overloaded (or underloaded) unit in the simulator, it can affect the performance of the entire system, adding latency to it. The first attempt to improve the results obtained with the simulator was to calibrate all of the simulator units. The approach used leads to the necessity of dividing the units into two categories: grouped units and isolated units. These two categories are analyzed separately, resulting in modifications to the original architecture.</description><identifier>ISBN: 9780769505909</identifier><identifier>ISBN: 0769505892</identifier><identifier>ISBN: 0769505902</identifier><identifier>DOI: 10.1109/HPC.2000.846568</identifier><language>eng</language><publisher>IEEE</publisher><subject>Clocks ; Computational modeling ; Computer architecture ; Computer science ; Computer simulation ; Delay ; Hardware ; Informatics ; Object oriented modeling ; Proposals</subject><ispartof>Proceedings Fourth International Conference/Exhibition on High Performance Computing in the Asia-Pacific Region, 2000, Vol.1, p.315-318 vol.1</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/846568$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,777,781,786,787,2052,4036,4037,27906,54901</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/846568$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Cavenaghi, M.A.</creatorcontrib><creatorcontrib>Martini, J.A.</creatorcontrib><creatorcontrib>Neto, A.G.</creatorcontrib><title>Proposal to solve workload problems in the simulator of the Wolf architecture</title><title>Proceedings Fourth International Conference/Exhibition on High Performance Computing in the Asia-Pacific Region</title><addtitle>HPC</addtitle><description>Presents an approach that has been proposed in order to investigate the workload balance problems in a simulator of the Wolf parallel architecture, known as Saw (Simulator of Architecture Wolf). This approach can be applied to the simulator in order to eliminate overloaded and underloaded units observed during the first experiments on the Wolf architecture. The unexpected results obtained are well-understood if one considers that the architecture simulated is based on a circular pipeline: if there is only one overloaded (or underloaded) unit in the simulator, it can affect the performance of the entire system, adding latency to it. The first attempt to improve the results obtained with the simulator was to calibrate all of the simulator units. The approach used leads to the necessity of dividing the units into two categories: grouped units and isolated units. These two categories are analyzed separately, resulting in modifications to the original architecture.</description><subject>Clocks</subject><subject>Computational modeling</subject><subject>Computer architecture</subject><subject>Computer science</subject><subject>Computer simulation</subject><subject>Delay</subject><subject>Hardware</subject><subject>Informatics</subject><subject>Object oriented modeling</subject><subject>Proposals</subject><isbn>9780769505909</isbn><isbn>0769505892</isbn><isbn>0769505902</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2000</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><recordid>eNotj0FLwzAYhgMiKLNnwVP-QOuXpE2aoxR1wsQdBh5H2n5h0dSUJFP89xa30wPPCw-8hNwyqBgDfb_edhUHgKqtZSPbC1Jo1YKSuoFGg74iRUofy86UlBz0NXndxjCHZDzNgabgv5H-hPjpgxnpHEPvcUrUfdF8QJrcdPQmh0iD_RfvwVtq4nBwGYd8jHhDLq3xCYszV2T39Ljr1uXm7fmle9iUrtW5VKLWA0gUwGy_YITeyn60iJxzMQyCc6vMqKy2vIFF1BzVqLhdtGx7KVbk7pR1iLifo5tM_N2fLos_W-JNNw</recordid><startdate>2000</startdate><enddate>2000</enddate><creator>Cavenaghi, M.A.</creator><creator>Martini, J.A.</creator><creator>Neto, A.G.</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>2000</creationdate><title>Proposal to solve workload problems in the simulator of the Wolf architecture</title><author>Cavenaghi, M.A. ; Martini, J.A. ; Neto, A.G.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i89t-7349c06e301fb6e3d0bf6bdfee2223cc322f7ad7f9f2503cc42e7d72f2f768b63</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2000</creationdate><topic>Clocks</topic><topic>Computational modeling</topic><topic>Computer architecture</topic><topic>Computer science</topic><topic>Computer simulation</topic><topic>Delay</topic><topic>Hardware</topic><topic>Informatics</topic><topic>Object oriented modeling</topic><topic>Proposals</topic><toplevel>online_resources</toplevel><creatorcontrib>Cavenaghi, M.A.</creatorcontrib><creatorcontrib>Martini, J.A.</creatorcontrib><creatorcontrib>Neto, A.G.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE/IET Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Cavenaghi, M.A.</au><au>Martini, J.A.</au><au>Neto, A.G.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Proposal to solve workload problems in the simulator of the Wolf architecture</atitle><btitle>Proceedings Fourth International Conference/Exhibition on High Performance Computing in the Asia-Pacific Region</btitle><stitle>HPC</stitle><date>2000</date><risdate>2000</risdate><volume>1</volume><spage>315</spage><epage>318 vol.1</epage><pages>315-318 vol.1</pages><isbn>9780769505909</isbn><isbn>0769505892</isbn><isbn>0769505902</isbn><abstract>Presents an approach that has been proposed in order to investigate the workload balance problems in a simulator of the Wolf parallel architecture, known as Saw (Simulator of Architecture Wolf). This approach can be applied to the simulator in order to eliminate overloaded and underloaded units observed during the first experiments on the Wolf architecture. The unexpected results obtained are well-understood if one considers that the architecture simulated is based on a circular pipeline: if there is only one overloaded (or underloaded) unit in the simulator, it can affect the performance of the entire system, adding latency to it. The first attempt to improve the results obtained with the simulator was to calibrate all of the simulator units. The approach used leads to the necessity of dividing the units into two categories: grouped units and isolated units. These two categories are analyzed separately, resulting in modifications to the original architecture.</abstract><pub>IEEE</pub><doi>10.1109/HPC.2000.846568</doi></addata></record>
fulltext fulltext_linktorsrc
identifier ISBN: 9780769505909
ispartof Proceedings Fourth International Conference/Exhibition on High Performance Computing in the Asia-Pacific Region, 2000, Vol.1, p.315-318 vol.1
issn
language eng
recordid cdi_ieee_primary_846568
source IEEE Electronic Library (IEL) Conference Proceedings
subjects Clocks
Computational modeling
Computer architecture
Computer science
Computer simulation
Delay
Hardware
Informatics
Object oriented modeling
Proposals
title Proposal to solve workload problems in the simulator of the Wolf architecture
url http://sfxeu10.hosted.exlibrisgroup.com/loughborough?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-17T21%3A34%3A45IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_6IE&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=Proposal%20to%20solve%20workload%20problems%20in%20the%20simulator%20of%20the%20Wolf%20architecture&rft.btitle=Proceedings%20Fourth%20International%20Conference/Exhibition%20on%20High%20Performance%20Computing%20in%20the%20Asia-Pacific%20Region&rft.au=Cavenaghi,%20M.A.&rft.date=2000&rft.volume=1&rft.spage=315&rft.epage=318%20vol.1&rft.pages=315-318%20vol.1&rft.isbn=9780769505909&rft.isbn_list=0769505892&rft.isbn_list=0769505902&rft_id=info:doi/10.1109/HPC.2000.846568&rft_dat=%3Cieee_6IE%3E846568%3C/ieee_6IE%3E%3Cgrp_id%3Ecdi_FETCH-LOGICAL-i89t-7349c06e301fb6e3d0bf6bdfee2223cc322f7ad7f9f2503cc42e7d72f2f768b63%3C/grp_id%3E%3Coa%3E%3C/oa%3E%3Curl%3E%3C/url%3E&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=846568&rfr_iscdi=true