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Smart scaling technology for advanced FinFET node

Because of the complexity of technology the level of engagement between technology and design has been increased more than ever before. Design technology co-optimization (DTCO) is used to describe the process of making with competitive power, performance, area, and yield (PPAY) in various applicatio...

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Bibliographic Details
Main Authors: Kye, Jongwook, Kim, Hoonki, Lim, Jinyoung, Lee, Seungyoung, Jung, Jonghoon, Song, Taejoong
Format: Conference Proceeding
Language:English
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Summary:Because of the complexity of technology the level of engagement between technology and design has been increased more than ever before. Design technology co-optimization (DTCO) is used to describe the process of making with competitive power, performance, area, and yield (PPAY) in various applications. This paper describes smart scaling technologies for advanced FinFET node to make technology more competitive.
ISSN:2158-9682
DOI:10.1109/VLSIT.2018.8510675