Effects of Control-FET Gate Resistance on False Turn-on in GaN Based Point of Load Converter

This paper investigates the impact of an external control-FET gate resistance on the spuriously induced synchronous-FET gate voltage in a 1 MHz point-of-load buck converter. An analytical circuit model with intrinsic device components and external parasitic parameters has been considered to resemble...

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Bibliographic Details
Main Authors: Koganti, Naga Babu, Dhakal, Shankar, Kini, Roshan L., Hontz, Michael R., Khanna, Raghav
Format: Conference Proceeding
Language:English
Subjects:
Analytical models
Buck converters
Control systems
control-FET
Field effect transistors
Logic gates
point-of-load buck converter
Resistance
Switching loss
synchronous-FET
Online Access:Request full text
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Description
Summary:This paper investigates the impact of an external control-FET gate resistance on the spuriously induced synchronous-FET gate voltage in a 1 MHz point-of-load buck converter. An analytical circuit model with intrinsic device components and external parasitic parameters has been considered to resemble test bench conditions. A relationship between control-FET gate resistance and synchronous-FET false turn-on induced voltage is presented in agreement with modeled and experimental results.
ISSN:2379-2027
DOI:10.1109/NAECON.2018.8556810