A SPICE Compatible Compact Model for Hot-Carrier Degradation in MOSFETs Under Different Experimental Conditions

A compact hot-carrier degradation (HCD) time kinetics model is proposed for conventional, lightly doped drain, and drain extended MOSFETs and FinFETs. It can predict measured data obtained using different methods such as shift in threshold voltage ( \Delta {V}_{\text {T}} ), linear ( \Delta {I}_{\te...

Full description

Saved in:
Bibliographic Details
Published in:IEEE transactions on electron devices 2019-02, Vol.66 (2), p.839-846
Main Authors: Sharma, Uma, Mahapatra, Souvik
Format: Article
Language:English
Subjects:
Channel length dependence
Degradation
DEMOS
Dependence
FinFETs
hot-carrier degradation (HCD) kinetics
Impact analysis
Kinetic theory
Logic gates
MOSFET
MOSFETs
Semiconductor device modeling
Semiconductor devices
Stress
Threshold voltage
Time measurement
voltage and temperature dependence
Citations: Items that this one cites
Items that cite this one
Online Access:Get full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:A compact hot-carrier degradation (HCD) time kinetics model is proposed for conventional, lightly doped drain, and drain extended MOSFETs and FinFETs. It can predict measured data obtained using different methods such as shift in threshold voltage ( \Delta {V}_{\text {T}} ), linear ( \Delta {I}_{\text {DLIN}} ) and saturation ( \Delta {I}_{\text {DSAT}} ) drain current, and charge pumping current ( \Delta {I}_{\text {CP}} ), for off- and on-state stress conditions. The influences of the gate ({V}_{\text {G}} ) and drain ( {V}_{\text {D}} ) bias for large {V}_{\text {D}} range and wide {V}_{\text {G}}/{V}_{\text {D}} combinations, temperature ( {T} ), and channel length ({L}_{\text {CH}} ) have been analyzed. The impact of {L}_{\text {CH}} variation on {V}_{\text {G}} dependence of HCD has been modeled. The model parameters are listed for different devices.
ISSN:0018-9383
1557-9646
DOI:10.1109/TED.2018.2883441