When Less Is More \ldots Few Bit ADCs in RF Systems

• Published in: IEEE access 2019, Vol.7, p.12035-12046
• Main Authors: Rodenbeck, Christopher T., Martinez, Matthew, Beun, Joshua B., Silva-Martinez, Jose, Karsilayan, Aydin Llker, Liechty, Robert
• Format: Article
• Language: English
• Subjects: Analog-to-digital converters (ADCs); Array signal processing; coherent receivers; Dynamic range; Gain; low resolution ADCs; quantization; Quantization (signal); radar; Radio frequency; radiofrequency integrated circuits; Receivers; Signal to noise ratio; wireless communications
• ISSN: 2169-3536; 2169-3536
• DOI: 10.1109/ACCESS.2018.2890701

Digitizing RF signals using few bit ADCs can provide system advantages in terms of reduced power dissipation, wider sampling bandwidth, and decreased demand for digital throughput. The diversity of established applications based on few bit ADCs, together with the recent surge of interest in the topic for 5G wireless communications and millimeter-wave radar, has created a need for practical design guidance governing their use in general RF systems. This paper, therefore, summarizes the state-of-the-art in few bit ADCs, comparing the dynamic range considerations involved with those of conventional RF receiver design. A simple analytic model for the monobit ADC is extended to multiple bits. Parametric analysis, independent of sampling considerations and system-specific signal processing, is used to illustrate the variation in the ADC output signal-to-noise-and-distortion ratio (SNDR) versus both the number of quantization bits and the input signal-to-noise ratio (SNR). At low and negative input SNR, increasing ADC resolution beyond 3-4 bits yields little advantage in output SNDR. Experiment confirms analytic predictions for the specific conditions under which the loss of signal fidelity due to quantization can be made negligible. In addition, parametric analysis of two-tone intermodulation distortion shows clear disadvantages to quantizing with