Board Level Reliability of Thinner Stacking Chips Package with Through Silicon Via Interposer

• Main Authors: Tsai, Wen Shan, Hsu, Bruce, Chang, Fred, Huang, Yun Long, Lin, Joe, Lin, C. F., Key Chung, C.
• Format: Conference Proceeding
• Language: English
• Subjects: Legged locomotion; Reliability; Silicon; Soldering; Stress; Substrates; Thermal stresses
• ISSN: 2150-5942
• DOI: 10.1109/IMPACT.2018.8625837

2.5D assembly, a package with stacking GPU and HBM chips onto through silicon via interposer (TSI), then mounted onto organic substrate is now mass produced and dedicated package solution for high performance and large volume numerical calculation applications. However, high cost for TSI wafer and substrate, also the large/thick package dimension and long assembly cycle time of 2.5D package are also limit its penetration of high performance applications. The applications using 2.5D package are continuously drive OSATs to thinner the outline dimension and assembly cycle time, especially the cost of 2.5D package, wish to apply this assembly platform on a wider field.A directly derivative of 2.5D package with thinner thickness/cost is to eliminate the organic substrate, and make the function of organic substrate as an RDL circuits onto the TSV interposer, so called TSI-FCBGA (patented). As a package without organic substrate, the outline dimension of this package will be only half of original structure. It will also shorten the cycle time of secondary assembly processes of chip modules onto organic substrate. As to eliminate organic substrate, the original at least 6 layers circuits on it is now re-distributed onto TSV interposer will make the RDL circuits on TSV interposer with fine line space and pitch to ensure matchable I/O before and after eliminating the organic substrate. Thus, the interconnection solder ball size and pitch will be smaller than that of original package with organic substrate. However, there is no reliability data available for this TSI-FCBGA package with smaller solder ball size and pitch.For the work of this paper, we modified platform of 2.5D package chip module with changing C4 side micro bump to solder ball, as a test vehicle of TSI-FCBGA, and demonstrated the board level reliability of it with different solder ball type, size, pitch, also molded solder ball on TSV interposer with daisy chain circuits. The results show the board level reliability of this thinner 2.5D package can pass mostly 733 thermal cycles with definite solder ball types and properties, though it is a little worse than original 2.5D package with organic substrate. Simulations are furtherly executed to find better structure of UBM and RDLs for future study.