LordCore: Energy-Efficient OpenCL-Programmable Software-Defined Radio Coprocessor

This paper proposes a single instruction multiple data (SIMD) processor, which is programmed with high-level OpenCL language. The low-power processor is customized for executing multiple-input-multiple-output (MIMO) detection algorithms at a high performance while consuming very little power making...

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Bibliographic Details
Published in:IEEE transactions on very large scale integration (VLSI) systems 2019-05, Vol.27 (5), p.1029-1042
Main Authors: Kultala, Heikki, Viitanen, Timo, Berg, Heikki, Jaaskelainen, Pekka, Multanen, Joonas, Kokkonen, Mikko, Raiskila, Kalle, Zetterman, Tommi, Takala, Jarmo
Format: Article
Language:English
Subjects:
Algorithms
Application-specific instruction set processor (ASIP)
Applications programs
Computer architecture
Coprocessors
Detectors
digital signal processor
Energy conservation
Energy efficiency
Energy management
Error detection
Hardware
Microprocessors
MIMO communication
multiple-input-multiple-output (MIMO) detector
Power consumption
Power demand
Power management
Radio frequency
Registers
Software
Software radio
vector processor
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Summary:This paper proposes a single instruction multiple data (SIMD) processor, which is programmed with high-level OpenCL language. The low-power processor is customized for executing multiple-input-multiple-output (MIMO) detection algorithms at a high performance while consuming very little power making it suitable for software-defined radio (SDR) applications. The novel combination of SIMD operations on a transport programmed multicore datapath allows saving power on both the execution front end and the back end, leading to very good energy efficiency with a compiler programmable design. We demonstrate the feasibility of the architecture with the layered orthogonal lattice detector and minimum mean-square-error MIMO algorithms, which can be used as a software-defined radio implementation of the 3GPP local thermal equilibrium r11 standard. Compared to other state-of-the-art SDR architectures, the proposed design adds features that improve programmer productivity with an insignificant power and area impact.
ISSN:1063-8210
1557-9999
DOI:10.1109/TVLSI.2019.2897508