Digital architectures based on chaotic cellular automata for compressed sensing of electrocardiographic (ECG) signals

This paper presents a couple of digital architectures based on chaotic cellular automata for Compressed Sensing (CS) of electrocardiographic (ECG) signals. The first architecture has been designed taking as starting point the recent CS algorithm proposed in literature, called Cellular Automata Chaos...

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Bibliographic Details
Main Authors: Vazquez, Saul Daniel Angeles, Romero, David Ernesto Troncoso, Ramirez, Manuel Salazar
Format: Conference Proceeding
Language:English
Subjects:
Automata
cellular automata
compressed sensing
Computer architecture
digital architecture
Discrete cosine transforms
electrocardiographic
Electrocardiography
Hardware
Signal to noise ratio
Sparse matrices
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Summary:This paper presents a couple of digital architectures based on chaotic cellular automata for Compressed Sensing (CS) of electrocardiographic (ECG) signals. The first architecture has been designed taking as starting point the recent CS algorithm proposed in literature, called Cellular Automata Chaos with Original Signal Thresholding (CAC-OST). For its construction, we have split that algorithm into five simple digital modules. The second architecture, which we call Cellular Automata Chaos for Streaming Signals (CAC-SS), has been designed in such a way that can be adequate for streaming processing. These digital architectures are implemented in FPGA Cyclone IV from Altera OR and compared against the state-of-the-art ECG CS system. For each digital architecture we report the number of Logic Elements (LE), registers, memory bits and maximum frequency of operation. The compressed signal is recovered in Matlab OR and compared with the original signal, the error rate and the level of signal to noise between recovered signal and original signal is calculated via Mean Squared Error (MSE) and Signal-to-Noise Ratio (SNR). Our experimental results show that CAC-OST has better compression characteristics but at expenses of a greater hardware utilization, whereas CAC-SS is the simplest one among these architectures.
ISSN:2573-0770
DOI:10.1109/ROPEC.2018.8661405