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HyHeMPS: A Hybrid Communication Infrastructure for MPSoCs
The increasing integration of many processing elements inside the same die has been raising the need to create efficient communication infrastructures. Different structures have been exploited to interconnect those elements, such as NoCs, crossbars and buses, each one being commonly employed separat...
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Main Authors: | , , |
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Format: | Conference Proceeding |
Language: | English |
Subjects: | |
Online Access: | Request full text |
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Summary: | The increasing integration of many processing elements inside the same die has been raising the need to create efficient communication infrastructures. Different structures have been exploited to interconnect those elements, such as NoCs, crossbars and buses, each one being commonly employed separately. However, current MPSoCs have faced severe design constraints that must balance area and communication efficiency. This work exploits, over a quantitative analysis, the feasibility of the separate employment of Shared Bus, NoC and Crossbar. Such analysis suggests that the utilization of an one-exclusive infrastructure is not ideal to balance the area and execution time. So, the second contribution of this work is the proposal of HyHeMPS (Hybrid-Hermes Multiprocessor System on chip) which merges the concepts of the three analyzed communication infrastructures (Bus, NoC, Crossbar) in a single platform. Results show that the proposed hybrid infrastructure can be used to balance the on chip communication constraints since it maintains performance of a 4x4 NoC saving up to 25% of chip area. |
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ISSN: | 2324-7894 |
DOI: | 10.1109/SBESC.2018.00043 |