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A Compiler for Automatic Selection of Suitable Processing-in-Memory Instructions

Although not a new technique, due to the advent of 3D-stacked technologies, the integration of large memories and logic circuitry able to compute large amount of data has revived the Processing-in-Memory (PIM) techniques. PIM is a technique to increase performance while reducing energy consumption w...

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Main Authors: Ahmed, Hameeza, Santos, Paulo C., Lima, Joao P. C., Moura, Rafael F., Alves, Marco A. Z., Beck, Antonio C. S., Carro, Luigi
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Language:English
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creator Ahmed, Hameeza
Santos, Paulo C.
Lima, Joao P. C.
Moura, Rafael F.
Alves, Marco A. Z.
Beck, Antonio C. S.
Carro, Luigi
description Although not a new technique, due to the advent of 3D-stacked technologies, the integration of large memories and logic circuitry able to compute large amount of data has revived the Processing-in-Memory (PIM) techniques. PIM is a technique to increase performance while reducing energy consumption when dealing with large amounts of data. Despite several designs of PIM are available in the literature, their effective implementation still burdens the programmer. Also, various PIM instances are required to take advantage of the internal 3D-stacked memories, which further increases the challenges faced by the programmers. In this way, this work presents the Processing-In-Memory cOmpiler (PRIMO). Our compiler is able to efficiently exploit large vector units on a PIM architecture, directly from the original code. PRIMO is able to automatically select suitable PIM operations, allowing its automatic offloading. Moreover, PRIMO concerns about several PIM instances, selecting the most suitable instance while reduces internal communication between different PIM units. The compilation results of different benchmarks depict how PRIMO is able to exploit large vectors, while achieving a near-optimal performance when compared to the ideal execution for the case study PIM. PRIMO allows a speedup of 38× for specific kernels, while on average achieves 11.8 × for a set of benchmarks from PolyBench Suite.
doi_str_mv 10.23919/DATE.2019.8714956
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fullrecord <record><control><sourceid>ieee_CHZPO</sourceid><recordid>TN_cdi_ieee_primary_8714956</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>8714956</ieee_id><sourcerecordid>8714956</sourcerecordid><originalsourceid>FETCH-LOGICAL-i175t-3943b367db8ee7dc958a8c8c8a6f47bbdcfc81cc707d045efaeb2520d7ca20f43</originalsourceid><addsrcrecordid>eNotj99KwzAcRqMguE1fQG_yAq350zTJZalTBxMHm9cjSX-RSNuMpL3Y2ys6votzczjwIfRAScm4pvrpuTmsS0aoLpWklRb1FVpyrahmNWf8Gi2oEKqglNBbtMz5mxAiONMLtGtwG4dT6CFhHxNu5ikOZgoO76EHN4U44ujxfg6TsT3gXYoOcg7jVxHG4h2GmM54M-YpzX9yvkM33vQZ7i9coc-X9aF9K7Yfr5u22RaBSjEVXFfc8lp2VgHIzmmhjHK_M7WvpLWd805R5ySRHakEeAOWCUY66QwjvuIr9PjfDQBwPKUwmHQ-Xt7zHzq_UD8</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>A Compiler for Automatic Selection of Suitable Processing-in-Memory Instructions</title><source>IEEE Xplore All Conference Series</source><creator>Ahmed, Hameeza ; Santos, Paulo C. ; Lima, Joao P. C. ; Moura, Rafael F. ; Alves, Marco A. Z. ; Beck, Antonio C. S. ; Carro, Luigi</creator><creatorcontrib>Ahmed, Hameeza ; Santos, Paulo C. ; Lima, Joao P. C. ; Moura, Rafael F. ; Alves, Marco A. Z. ; Beck, Antonio C. S. ; Carro, Luigi</creatorcontrib><description>Although not a new technique, due to the advent of 3D-stacked technologies, the integration of large memories and logic circuitry able to compute large amount of data has revived the Processing-in-Memory (PIM) techniques. PIM is a technique to increase performance while reducing energy consumption when dealing with large amounts of data. Despite several designs of PIM are available in the literature, their effective implementation still burdens the programmer. Also, various PIM instances are required to take advantage of the internal 3D-stacked memories, which further increases the challenges faced by the programmers. In this way, this work presents the Processing-In-Memory cOmpiler (PRIMO). Our compiler is able to efficiently exploit large vector units on a PIM architecture, directly from the original code. PRIMO is able to automatically select suitable PIM operations, allowing its automatic offloading. Moreover, PRIMO concerns about several PIM instances, selecting the most suitable instance while reduces internal communication between different PIM units. The compilation results of different benchmarks depict how PRIMO is able to exploit large vectors, while achieving a near-optimal performance when compared to the ideal execution for the case study PIM. PRIMO allows a speedup of 38× for specific kernels, while on average achieves 11.8 × for a set of benchmarks from PolyBench Suite.</description><identifier>EISSN: 1558-1101</identifier><identifier>EISBN: 3981926323</identifier><identifier>EISBN: 9783981926323</identifier><identifier>DOI: 10.23919/DATE.2019.8714956</identifier><language>eng</language><publisher>EDAA</publisher><subject>3D-Stacked memories ; Bandwidth ; Compiler ; Graphics processing units ; Hardware ; Kernel ; Memory management ; Near-data computing ; Processing in Memory ; Random access memory ; SIMD ; Vector instructions</subject><ispartof>2019 Design, Automation &amp; Test in Europe Conference &amp; Exhibition (DATE), 2019, p.564-569</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/8714956$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,780,784,789,790,23930,23931,25140,27925,54555,54932</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/8714956$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Ahmed, Hameeza</creatorcontrib><creatorcontrib>Santos, Paulo C.</creatorcontrib><creatorcontrib>Lima, Joao P. C.</creatorcontrib><creatorcontrib>Moura, Rafael F.</creatorcontrib><creatorcontrib>Alves, Marco A. Z.</creatorcontrib><creatorcontrib>Beck, Antonio C. S.</creatorcontrib><creatorcontrib>Carro, Luigi</creatorcontrib><title>A Compiler for Automatic Selection of Suitable Processing-in-Memory Instructions</title><title>2019 Design, Automation &amp; Test in Europe Conference &amp; Exhibition (DATE)</title><addtitle>DATE</addtitle><description>Although not a new technique, due to the advent of 3D-stacked technologies, the integration of large memories and logic circuitry able to compute large amount of data has revived the Processing-in-Memory (PIM) techniques. PIM is a technique to increase performance while reducing energy consumption when dealing with large amounts of data. Despite several designs of PIM are available in the literature, their effective implementation still burdens the programmer. Also, various PIM instances are required to take advantage of the internal 3D-stacked memories, which further increases the challenges faced by the programmers. In this way, this work presents the Processing-In-Memory cOmpiler (PRIMO). Our compiler is able to efficiently exploit large vector units on a PIM architecture, directly from the original code. PRIMO is able to automatically select suitable PIM operations, allowing its automatic offloading. Moreover, PRIMO concerns about several PIM instances, selecting the most suitable instance while reduces internal communication between different PIM units. The compilation results of different benchmarks depict how PRIMO is able to exploit large vectors, while achieving a near-optimal performance when compared to the ideal execution for the case study PIM. PRIMO allows a speedup of 38× for specific kernels, while on average achieves 11.8 × for a set of benchmarks from PolyBench Suite.</description><subject>3D-Stacked memories</subject><subject>Bandwidth</subject><subject>Compiler</subject><subject>Graphics processing units</subject><subject>Hardware</subject><subject>Kernel</subject><subject>Memory management</subject><subject>Near-data computing</subject><subject>Processing in Memory</subject><subject>Random access memory</subject><subject>SIMD</subject><subject>Vector instructions</subject><issn>1558-1101</issn><isbn>3981926323</isbn><isbn>9783981926323</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2019</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><recordid>eNotj99KwzAcRqMguE1fQG_yAq350zTJZalTBxMHm9cjSX-RSNuMpL3Y2ys6votzczjwIfRAScm4pvrpuTmsS0aoLpWklRb1FVpyrahmNWf8Gi2oEKqglNBbtMz5mxAiONMLtGtwG4dT6CFhHxNu5ikOZgoO76EHN4U44ujxfg6TsT3gXYoOcg7jVxHG4h2GmM54M-YpzX9yvkM33vQZ7i9coc-X9aF9K7Yfr5u22RaBSjEVXFfc8lp2VgHIzmmhjHK_M7WvpLWd805R5ySRHakEeAOWCUY66QwjvuIr9PjfDQBwPKUwmHQ-Xt7zHzq_UD8</recordid><startdate>201903</startdate><enddate>201903</enddate><creator>Ahmed, Hameeza</creator><creator>Santos, Paulo C.</creator><creator>Lima, Joao P. C.</creator><creator>Moura, Rafael F.</creator><creator>Alves, Marco A. Z.</creator><creator>Beck, Antonio C. S.</creator><creator>Carro, Luigi</creator><general>EDAA</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>201903</creationdate><title>A Compiler for Automatic Selection of Suitable Processing-in-Memory Instructions</title><author>Ahmed, Hameeza ; Santos, Paulo C. ; Lima, Joao P. C. ; Moura, Rafael F. ; Alves, Marco A. Z. ; Beck, Antonio C. S. ; Carro, Luigi</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i175t-3943b367db8ee7dc958a8c8c8a6f47bbdcfc81cc707d045efaeb2520d7ca20f43</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2019</creationdate><topic>3D-Stacked memories</topic><topic>Bandwidth</topic><topic>Compiler</topic><topic>Graphics processing units</topic><topic>Hardware</topic><topic>Kernel</topic><topic>Memory management</topic><topic>Near-data computing</topic><topic>Processing in Memory</topic><topic>Random access memory</topic><topic>SIMD</topic><topic>Vector instructions</topic><toplevel>online_resources</toplevel><creatorcontrib>Ahmed, Hameeza</creatorcontrib><creatorcontrib>Santos, Paulo C.</creatorcontrib><creatorcontrib>Lima, Joao P. C.</creatorcontrib><creatorcontrib>Moura, Rafael F.</creatorcontrib><creatorcontrib>Alves, Marco A. Z.</creatorcontrib><creatorcontrib>Beck, Antonio C. S.</creatorcontrib><creatorcontrib>Carro, Luigi</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEL</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Ahmed, Hameeza</au><au>Santos, Paulo C.</au><au>Lima, Joao P. C.</au><au>Moura, Rafael F.</au><au>Alves, Marco A. Z.</au><au>Beck, Antonio C. S.</au><au>Carro, Luigi</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>A Compiler for Automatic Selection of Suitable Processing-in-Memory Instructions</atitle><btitle>2019 Design, Automation &amp; Test in Europe Conference &amp; Exhibition (DATE)</btitle><stitle>DATE</stitle><date>2019-03</date><risdate>2019</risdate><spage>564</spage><epage>569</epage><pages>564-569</pages><eissn>1558-1101</eissn><eisbn>3981926323</eisbn><eisbn>9783981926323</eisbn><abstract>Although not a new technique, due to the advent of 3D-stacked technologies, the integration of large memories and logic circuitry able to compute large amount of data has revived the Processing-in-Memory (PIM) techniques. PIM is a technique to increase performance while reducing energy consumption when dealing with large amounts of data. Despite several designs of PIM are available in the literature, their effective implementation still burdens the programmer. Also, various PIM instances are required to take advantage of the internal 3D-stacked memories, which further increases the challenges faced by the programmers. In this way, this work presents the Processing-In-Memory cOmpiler (PRIMO). Our compiler is able to efficiently exploit large vector units on a PIM architecture, directly from the original code. PRIMO is able to automatically select suitable PIM operations, allowing its automatic offloading. Moreover, PRIMO concerns about several PIM instances, selecting the most suitable instance while reduces internal communication between different PIM units. The compilation results of different benchmarks depict how PRIMO is able to exploit large vectors, while achieving a near-optimal performance when compared to the ideal execution for the case study PIM. PRIMO allows a speedup of 38× for specific kernels, while on average achieves 11.8 × for a set of benchmarks from PolyBench Suite.</abstract><pub>EDAA</pub><doi>10.23919/DATE.2019.8714956</doi><tpages>6</tpages></addata></record>
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source IEEE Xplore All Conference Series
subjects 3D-Stacked memories
Bandwidth
Compiler
Graphics processing units
Hardware
Kernel
Memory management
Near-data computing
Processing in Memory
Random access memory
SIMD
Vector instructions
title A Compiler for Automatic Selection of Suitable Processing-in-Memory Instructions
url http://sfxeu10.hosted.exlibrisgroup.com/loughborough?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-25T16%3A33%3A39IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_CHZPO&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=A%20Compiler%20for%20Automatic%20Selection%20of%20Suitable%20Processing-in-Memory%20Instructions&rft.btitle=2019%20Design,%20Automation%20&%20Test%20in%20Europe%20Conference%20&%20Exhibition%20(DATE)&rft.au=Ahmed,%20Hameeza&rft.date=2019-03&rft.spage=564&rft.epage=569&rft.pages=564-569&rft.eissn=1558-1101&rft_id=info:doi/10.23919/DATE.2019.8714956&rft.eisbn=3981926323&rft.eisbn_list=9783981926323&rft_dat=%3Cieee_CHZPO%3E8714956%3C/ieee_CHZPO%3E%3Cgrp_id%3Ecdi_FETCH-LOGICAL-i175t-3943b367db8ee7dc958a8c8c8a6f47bbdcfc81cc707d045efaeb2520d7ca20f43%3C/grp_id%3E%3Coa%3E%3C/oa%3E%3Curl%3E%3C/url%3E&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=8714956&rfr_iscdi=true