MixLock: Securing Mixed-Signal Circuits via Logic Locking

In this paper, we propose a hardware security methodology for mixed-signal Integrated Circuits (ICs). The proposed methodology can be used as a countermeasure for IC piracy, including counterfeiting and reverse engineering. It relies on logic locking of the digital section of the mixed-signal IC, su...

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Bibliographic Details
Main Authors: Leonhard, Julian, Yasin, Muhammad, Turk, Shadi, Nabeel, Mohammed Thari, Louerat, Marie-Minerve, Chotin-Avot, Roselyne, Aboushady, Hassan, Sinanoglu, Ozgur, Stratigopoulos, Haralampos-G.
Format: Conference Proceeding
Language:English
Subjects:
Hardware
Integrated circuits
Logic gates
Resilience
Reverse engineering
Security
Transistors
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Summary:In this paper, we propose a hardware security methodology for mixed-signal Integrated Circuits (ICs). The proposed methodology can be used as a countermeasure for IC piracy, including counterfeiting and reverse engineering. It relies on logic locking of the digital section of the mixed-signal IC, such that unless the correct key is provided, the mixed-signal performance will be pushed outside of the acceptable specification range. We employ a state-of-the-art logic locking technique, called Stripped Functionality Logic Locking (SFLL). We show that strong security levels are achieved in both mixed-signal and digital domains. In addition, the proposed methodology presents several appealing properties. It is non-intrusive for the analog section, it incurs reasonable area and power overhead, it can be fully automated, and it is virtually applicable to a wide range of mixed-signal ICs. We demonstrate it on a ΣΔ Analog-to-Digital Converter (ADC).
ISSN:1558-1101
DOI:10.23919/DATE.2019.8715043