Loading…
Fast and Power-Analysis Resistant Ring Lizard Crypto-Processor Based on the Sparse Ternary Property
Ring Lizard (RLizard) is a quantum-resistant public-key cryptosystem based on the ideal lattice. RLizard uses a sparse ternary polynomial, which facilitates implementation with lower complexity. The Lizard scheme's proposal for the National Institute of Standards and Technology's post-quan...
Saved in:
Published in: | IEEE access 2019, Vol.7, p.98684-98693 |
---|---|
Main Authors: | , , |
Format: | Article |
Language: | English |
Subjects: | |
Citations: | Items that this one cites Items that cite this one |
Online Access: | Get full text |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
cited_by | cdi_FETCH-LOGICAL-c408t-2f22bcce7cee31731aeb3817feb3dc9a81df417f9071f998884a50552a6ec53f3 |
---|---|
cites | cdi_FETCH-LOGICAL-c408t-2f22bcce7cee31731aeb3817feb3dc9a81df417f9071f998884a50552a6ec53f3 |
container_end_page | 98693 |
container_issue | |
container_start_page | 98684 |
container_title | IEEE access |
container_volume | 7 |
creator | Choi, Piljoo Kim, Ji-Hoon Kim, Dong Kyue |
description | Ring Lizard (RLizard) is a quantum-resistant public-key cryptosystem based on the ideal lattice. RLizard uses a sparse ternary polynomial, which facilitates implementation with lower complexity. The Lizard scheme's proposal for the National Institute of Standards and Technology's post-quantum cryptography standardization included its reference hardware design using the sparse ternary property; however, in this paper, we present the RLizard crypto-processor with the improved processing speed and security level against power analysis attacks. By additionally utilizing unused values for each memory access in the conventional RLizard crypto-processor, the processing speed of the proposed RLizard crypto-processors can increase by a factor of two or up to four times. The implementation results with three different FPGA devices show that the area overhead is approximately 50-100 flip-flops (FFs) and 50-300 lookup tables (LUTs), occupying approximately 2%-3% of the total area. The vulnerability to power analysis attacks and the proposed countermeasures were also analyzed. The experimental results prove the vulnerability of unprotected implementation, and the implementation results show that the masking and hiding countermeasures additionally require approximately 50-120 FFs and 100-360 LUTs. In addition, our idea can be applied to other ideal-lattice-based cryptosystems using a sparse binary or ternary polynomial, such as NTRU and Round5. |
doi_str_mv | 10.1109/ACCESS.2019.2929299 |
format | article |
fullrecord | <record><control><sourceid>proquest_ieee_</sourceid><recordid>TN_cdi_ieee_primary_8764529</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>8764529</ieee_id><doaj_id>oai_doaj_org_article_a3a5b1a3bb334c048ddd5de898f414e7</doaj_id><sourcerecordid>2455642491</sourcerecordid><originalsourceid>FETCH-LOGICAL-c408t-2f22bcce7cee31731aeb3817feb3dc9a81df417f9071f998884a50552a6ec53f3</originalsourceid><addsrcrecordid>eNpNUV1r3DAQNKWBhiS_IC-CPPuqT1t6vJqkDRwk5NJnsZbWqY-L5UoK5fLro6tDiBa0q2VmdsVU1SWjK8ao-b7uuuvtdsUpMytujmG-VKecNaYWSjRfP9XfqouUdrQcXVqqPa3cDaRMYPLkPvzDWK8n2B_SmMgDljvDlMnDOD2RzfgK0ZMuHuYc6vsYHKYUIvkBCT0JE8l_kGxniAnJI8YJ4oEU1IwxH86rkwH2CS_e81n1--b6sftVb-5-3nbrTe0k1bnmA-e9c9g6RMFawQB7oVk7lOSdAc38IMvT0JYNxmitJSiqFIcGnRKDOKtuF10fYGfnOD6XLWyA0f5vhPhkIebR7dGCANUzEH0vhHRUau-98qiNLiMktkXratGaY_j7ginbXXgp39ony6VSjeTSsIISC8rFkFLE4WMqo_Zojl3MsUdz7Ls5hXW5sEZE_GDotpGKG_EGjK-LlQ</addsrcrecordid><sourcetype>Open Website</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>2455642491</pqid></control><display><type>article</type><title>Fast and Power-Analysis Resistant Ring Lizard Crypto-Processor Based on the Sparse Ternary Property</title><source>IEEE Xplore Open Access Journals</source><creator>Choi, Piljoo ; Kim, Ji-Hoon ; Kim, Dong Kyue</creator><creatorcontrib>Choi, Piljoo ; Kim, Ji-Hoon ; Kim, Dong Kyue</creatorcontrib><description>Ring Lizard (RLizard) is a quantum-resistant public-key cryptosystem based on the ideal lattice. RLizard uses a sparse ternary polynomial, which facilitates implementation with lower complexity. The Lizard scheme's proposal for the National Institute of Standards and Technology's post-quantum cryptography standardization included its reference hardware design using the sparse ternary property; however, in this paper, we present the RLizard crypto-processor with the improved processing speed and security level against power analysis attacks. By additionally utilizing unused values for each memory access in the conventional RLizard crypto-processor, the processing speed of the proposed RLizard crypto-processors can increase by a factor of two or up to four times. The implementation results with three different FPGA devices show that the area overhead is approximately 50-100 flip-flops (FFs) and 50-300 lookup tables (LUTs), occupying approximately 2%-3% of the total area. The vulnerability to power analysis attacks and the proposed countermeasures were also analyzed. The experimental results prove the vulnerability of unprotected implementation, and the implementation results show that the masking and hiding countermeasures additionally require approximately 50-120 FFs and 100-360 LUTs. In addition, our idea can be applied to other ideal-lattice-based cryptosystems using a sparse binary or ternary polynomial, such as NTRU and Round5.</description><identifier>ISSN: 2169-3536</identifier><identifier>EISSN: 2169-3536</identifier><identifier>DOI: 10.1109/ACCESS.2019.2929299</identifier><identifier>CODEN: IAECCG</identifier><language>eng</language><publisher>Piscataway: IEEE</publisher><subject>Computer systems ; Convolution ; Coprocessors ; digital circuits ; Elliptic curve cryptography ; field programmable gate arrays ; Hardware ; Lattices ; Lizards ; Lookup tables ; Microprocessors ; Polynomials ; post-quantum cryptography ; Proposals ; Quantum cryptography ; Side-channel attacks ; Standardization</subject><ispartof>IEEE access, 2019, Vol.7, p.98684-98693</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2019</rights><lds50>peer_reviewed</lds50><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c408t-2f22bcce7cee31731aeb3817feb3dc9a81df417f9071f998884a50552a6ec53f3</citedby><cites>FETCH-LOGICAL-c408t-2f22bcce7cee31731aeb3817feb3dc9a81df417f9071f998884a50552a6ec53f3</cites><orcidid>0000-0001-5614-0449 ; 0000-0002-9809-1339 ; 0000-0002-3354-8975</orcidid></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/8764529$$EHTML$$P50$$Gieee$$Hfree_for_read</linktohtml><link.rule.ids>314,776,780,4010,27609,27899,27900,27901,54907</link.rule.ids></links><search><creatorcontrib>Choi, Piljoo</creatorcontrib><creatorcontrib>Kim, Ji-Hoon</creatorcontrib><creatorcontrib>Kim, Dong Kyue</creatorcontrib><title>Fast and Power-Analysis Resistant Ring Lizard Crypto-Processor Based on the Sparse Ternary Property</title><title>IEEE access</title><addtitle>Access</addtitle><description>Ring Lizard (RLizard) is a quantum-resistant public-key cryptosystem based on the ideal lattice. RLizard uses a sparse ternary polynomial, which facilitates implementation with lower complexity. The Lizard scheme's proposal for the National Institute of Standards and Technology's post-quantum cryptography standardization included its reference hardware design using the sparse ternary property; however, in this paper, we present the RLizard crypto-processor with the improved processing speed and security level against power analysis attacks. By additionally utilizing unused values for each memory access in the conventional RLizard crypto-processor, the processing speed of the proposed RLizard crypto-processors can increase by a factor of two or up to four times. The implementation results with three different FPGA devices show that the area overhead is approximately 50-100 flip-flops (FFs) and 50-300 lookup tables (LUTs), occupying approximately 2%-3% of the total area. The vulnerability to power analysis attacks and the proposed countermeasures were also analyzed. The experimental results prove the vulnerability of unprotected implementation, and the implementation results show that the masking and hiding countermeasures additionally require approximately 50-120 FFs and 100-360 LUTs. In addition, our idea can be applied to other ideal-lattice-based cryptosystems using a sparse binary or ternary polynomial, such as NTRU and Round5.</description><subject>Computer systems</subject><subject>Convolution</subject><subject>Coprocessors</subject><subject>digital circuits</subject><subject>Elliptic curve cryptography</subject><subject>field programmable gate arrays</subject><subject>Hardware</subject><subject>Lattices</subject><subject>Lizards</subject><subject>Lookup tables</subject><subject>Microprocessors</subject><subject>Polynomials</subject><subject>post-quantum cryptography</subject><subject>Proposals</subject><subject>Quantum cryptography</subject><subject>Side-channel attacks</subject><subject>Standardization</subject><issn>2169-3536</issn><issn>2169-3536</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2019</creationdate><recordtype>article</recordtype><sourceid>ESBDL</sourceid><sourceid>DOA</sourceid><recordid>eNpNUV1r3DAQNKWBhiS_IC-CPPuqT1t6vJqkDRwk5NJnsZbWqY-L5UoK5fLro6tDiBa0q2VmdsVU1SWjK8ao-b7uuuvtdsUpMytujmG-VKecNaYWSjRfP9XfqouUdrQcXVqqPa3cDaRMYPLkPvzDWK8n2B_SmMgDljvDlMnDOD2RzfgK0ZMuHuYc6vsYHKYUIvkBCT0JE8l_kGxniAnJI8YJ4oEU1IwxH86rkwH2CS_e81n1--b6sftVb-5-3nbrTe0k1bnmA-e9c9g6RMFawQB7oVk7lOSdAc38IMvT0JYNxmitJSiqFIcGnRKDOKtuF10fYGfnOD6XLWyA0f5vhPhkIebR7dGCANUzEH0vhHRUau-98qiNLiMktkXratGaY_j7ginbXXgp39ony6VSjeTSsIISC8rFkFLE4WMqo_Zojl3MsUdz7Ls5hXW5sEZE_GDotpGKG_EGjK-LlQ</recordid><startdate>2019</startdate><enddate>2019</enddate><creator>Choi, Piljoo</creator><creator>Kim, Ji-Hoon</creator><creator>Kim, Dong Kyue</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>97E</scope><scope>ESBDL</scope><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SC</scope><scope>7SP</scope><scope>7SR</scope><scope>8BQ</scope><scope>8FD</scope><scope>JG9</scope><scope>JQ2</scope><scope>L7M</scope><scope>L~C</scope><scope>L~D</scope><scope>DOA</scope><orcidid>https://orcid.org/0000-0001-5614-0449</orcidid><orcidid>https://orcid.org/0000-0002-9809-1339</orcidid><orcidid>https://orcid.org/0000-0002-3354-8975</orcidid></search><sort><creationdate>2019</creationdate><title>Fast and Power-Analysis Resistant Ring Lizard Crypto-Processor Based on the Sparse Ternary Property</title><author>Choi, Piljoo ; Kim, Ji-Hoon ; Kim, Dong Kyue</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c408t-2f22bcce7cee31731aeb3817feb3dc9a81df417f9071f998884a50552a6ec53f3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2019</creationdate><topic>Computer systems</topic><topic>Convolution</topic><topic>Coprocessors</topic><topic>digital circuits</topic><topic>Elliptic curve cryptography</topic><topic>field programmable gate arrays</topic><topic>Hardware</topic><topic>Lattices</topic><topic>Lizards</topic><topic>Lookup tables</topic><topic>Microprocessors</topic><topic>Polynomials</topic><topic>post-quantum cryptography</topic><topic>Proposals</topic><topic>Quantum cryptography</topic><topic>Side-channel attacks</topic><topic>Standardization</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Choi, Piljoo</creatorcontrib><creatorcontrib>Kim, Ji-Hoon</creatorcontrib><creatorcontrib>Kim, Dong Kyue</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE Xplore Open Access Journals</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998–Present</collection><collection>IEEE/IET Electronic Library (IEL)</collection><collection>CrossRef</collection><collection>Computer and Information Systems Abstracts</collection><collection>Electronics & Communications Abstracts</collection><collection>Engineered Materials Abstracts</collection><collection>METADEX</collection><collection>Technology Research Database</collection><collection>Materials Research Database</collection><collection>ProQuest Computer Science Collection</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>Computer and Information Systems Abstracts Academic</collection><collection>Computer and Information Systems Abstracts Professional</collection><collection>Directory of Open Access Journals</collection><jtitle>IEEE access</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Choi, Piljoo</au><au>Kim, Ji-Hoon</au><au>Kim, Dong Kyue</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Fast and Power-Analysis Resistant Ring Lizard Crypto-Processor Based on the Sparse Ternary Property</atitle><jtitle>IEEE access</jtitle><stitle>Access</stitle><date>2019</date><risdate>2019</risdate><volume>7</volume><spage>98684</spage><epage>98693</epage><pages>98684-98693</pages><issn>2169-3536</issn><eissn>2169-3536</eissn><coden>IAECCG</coden><abstract>Ring Lizard (RLizard) is a quantum-resistant public-key cryptosystem based on the ideal lattice. RLizard uses a sparse ternary polynomial, which facilitates implementation with lower complexity. The Lizard scheme's proposal for the National Institute of Standards and Technology's post-quantum cryptography standardization included its reference hardware design using the sparse ternary property; however, in this paper, we present the RLizard crypto-processor with the improved processing speed and security level against power analysis attacks. By additionally utilizing unused values for each memory access in the conventional RLizard crypto-processor, the processing speed of the proposed RLizard crypto-processors can increase by a factor of two or up to four times. The implementation results with three different FPGA devices show that the area overhead is approximately 50-100 flip-flops (FFs) and 50-300 lookup tables (LUTs), occupying approximately 2%-3% of the total area. The vulnerability to power analysis attacks and the proposed countermeasures were also analyzed. The experimental results prove the vulnerability of unprotected implementation, and the implementation results show that the masking and hiding countermeasures additionally require approximately 50-120 FFs and 100-360 LUTs. In addition, our idea can be applied to other ideal-lattice-based cryptosystems using a sparse binary or ternary polynomial, such as NTRU and Round5.</abstract><cop>Piscataway</cop><pub>IEEE</pub><doi>10.1109/ACCESS.2019.2929299</doi><tpages>10</tpages><orcidid>https://orcid.org/0000-0001-5614-0449</orcidid><orcidid>https://orcid.org/0000-0002-9809-1339</orcidid><orcidid>https://orcid.org/0000-0002-3354-8975</orcidid><oa>free_for_read</oa></addata></record> |
fulltext | fulltext |
identifier | ISSN: 2169-3536 |
ispartof | IEEE access, 2019, Vol.7, p.98684-98693 |
issn | 2169-3536 2169-3536 |
language | eng |
recordid | cdi_ieee_primary_8764529 |
source | IEEE Xplore Open Access Journals |
subjects | Computer systems Convolution Coprocessors digital circuits Elliptic curve cryptography field programmable gate arrays Hardware Lattices Lizards Lookup tables Microprocessors Polynomials post-quantum cryptography Proposals Quantum cryptography Side-channel attacks Standardization |
title | Fast and Power-Analysis Resistant Ring Lizard Crypto-Processor Based on the Sparse Ternary Property |
url | http://sfxeu10.hosted.exlibrisgroup.com/loughborough?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-24T09%3A51%3A24IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_ieee_&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=Fast%20and%20Power-Analysis%20Resistant%20Ring%20Lizard%20Crypto-Processor%20Based%20on%20the%20Sparse%20Ternary%20Property&rft.jtitle=IEEE%20access&rft.au=Choi,%20Piljoo&rft.date=2019&rft.volume=7&rft.spage=98684&rft.epage=98693&rft.pages=98684-98693&rft.issn=2169-3536&rft.eissn=2169-3536&rft.coden=IAECCG&rft_id=info:doi/10.1109/ACCESS.2019.2929299&rft_dat=%3Cproquest_ieee_%3E2455642491%3C/proquest_ieee_%3E%3Cgrp_id%3Ecdi_FETCH-LOGICAL-c408t-2f22bcce7cee31731aeb3817feb3dc9a81df417f9071f998884a50552a6ec53f3%3C/grp_id%3E%3Coa%3E%3C/oa%3E%3Curl%3E%3C/url%3E&rft_id=info:oai/&rft_pqid=2455642491&rft_id=info:pmid/&rft_ieee_id=8764529&rfr_iscdi=true |