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Microwave performance of ion-implanted InP JFETs

These devices have a planar structure with the channel and gate regions formed by the selective implantation of silicon and beryllium into an Fe-doped semi-insulating InP substrate. The nominal gate length is 2 mu m with a channel doping of 10/sup 17/ cm/sup -3/ and thickness of 0.2 mu m. The measur...

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Bibliographic Details
Published in:IEEE transactions on electron devices 1988-12, Vol.35 (12), p.2279-2287
Main Authors: Kruppa, W., Boos, J.B.
Format: Article
Language:English
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Summary:These devices have a planar structure with the channel and gate regions formed by the selective implantation of silicon and beryllium into an Fe-doped semi-insulating InP substrate. The nominal gate length is 2 mu m with a channel doping of 10/sup 17/ cm/sup -3/ and thickness of 0.2 mu m. The measured values of f/sub T/ and f/sub max/ are 10 and 23 GHz, respectively. Examination of the equivalent circuit parameters and their variation with bias led to the following conclusions: (a) a relatively gradual channel profile results in lower than desired transconductance, but also lower gate-to-channel capacitance; (b) although for the present devices, the gate length and transconductance are the primary performance-limiting parameters, the gate contact resistance also reduces the power gain significantly; (c) the output resistance appears lower than that of an equivalent GaAs MESFET, and requires a larger V/sub DS/ to reach its maximum value; and (d) a dipole layer forms and decouples the gate from the drain with a strength that falls between that of previously reported GaAs MESFETs and InP MESFETs.< >
ISSN:0018-9383
1557-9646
DOI:10.1109/16.8803