Series-voltage noise margin of CMOS

The concept of noise margin is very important in the design and application of digital logic circuits. Noise margin is the maximum spurious signal that can be accepted by the device when used in a system, whilst still operating correctly. In this work the methods of determining the static and dynami...

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Bibliographic Details
Main Authors: Szabo, A., Butkovic, Z.
Format: Conference Proceeding
Language:English
Subjects:
Circuit noise
Digital systems
Equations
Flip-flops
Inverters
Logic circuits
Logic gates
Noise level
Noise shaping
Voltage
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Summary:The concept of noise margin is very important in the design and application of digital logic circuits. Noise margin is the maximum spurious signal that can be accepted by the device when used in a system, whilst still operating correctly. In this work the methods of determining the static and dynamic series-voltage noise margins and the obtained results for CMOS are presented.
DOI:10.1109/MELCON.2000.880399