Die Thickness Optimization for Preventing Electro-Thermal Fails Induced by Solder Voids in Power Devices

Vertical power devices require thin dice to reach high electrical performance especially for automotive market. Beside their several advantages, thin power devices reveal issues related to assembly processes. Die bonding process step typically generates solder voids which can lead to thermal-induced...

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Bibliographic Details
Main Authors: Vitello, Dario, Albertinetti, Andrea, Rovitto, Marco
Format: Conference Proceeding
Language:English
Subjects:
Earth Observing System
electrical over stress fail
Finite element analysis
finite element method
Material properties
Metals
Microassembly
Numerical models
power device
Silicon
solder voids
thin die
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Summary:Vertical power devices require thin dice to reach high electrical performance especially for automotive market. Beside their several advantages, thin power devices reveal issues related to assembly processes. Die bonding process step typically generates solder voids which can lead to thermal-induced fails. The paper deals with die thickness optimization in order to reduce the risk of failures due to the presence of voids by considering manufacturing limitations. For this purpose, electro-thermal modeling is employed to calculate the temperature at which fail occurs. Further, it allows to estimate the impact of die thickness and solder void size on the device temperature distribution during operating life.
ISSN:2377-5726
DOI:10.1109/ECTC.2019.00-34