Aging Analysis of Low Dropout Regulator for Universal Recycled IC Detection

• Main Authors: Chowdhury, Sreeja, Shen, Haoting, Park, Beomsoo, Maghari, Nima, Forte, Domenic
• Format: Conference Proceeding
• Language: English
• Subjects: Aging; Capacitance; Degradation; HCI; Integrated circuits; Logic gates; Low Drop Out Regulator (LDO); NBTI; Power Supply Rejection Ratio (PSRR); Recycled IC detection; transistor aging; Transistors; Voltage control
• ISSN: 2159-3477
• DOI: 10.1109/ISVLSI.2019.00113

Recycled counterfeit integrated circuits (ICs) are previously used chips that originate from improperly disposed electronics (i.e., e-waste) and are then sold in the market as new. Recycled ICs are dangerous and prone to early failure due to mishandling and deterioration from prior use. With the number of IoT devices expected to reach 125 billion in 2030, ewaste and therefore recycled ICs will face a commensurate rise. Although recycled IC detection and avoidance methods have been emerging over the last decade, there still lacks an all-inone solution. Previously, we discovered low dropout regulator (LDO) aging can be detected with high confidence by measuring the LDO's power supply rejection ratio (PSRR). Since LDOs are embedded in the power management circuitry of virtually all ICs, our method could be applied to avoid recycled chips in any IoT setup, thus bolstering IoT security. Since commercial LDO designs are proprietary to individual design houses, it is difficult to determine the most important sources of degradation. Thus, in order to study this phenomenon further, we have fabricated a custom design generic LDO in 65nm process. Our analysis in this paper reveals ways to improve counterfeit IC detection based on LDOs as well as to develop LDO designs that are even more sensitive to aging/use.