A Sub-pJ/Bit, Low-ER Mach-Zehnder-Based Transmitter for Chip-to-Chip Optical Interconnects

Designing high-speed and low-power interconnects is a challenge for high performance computing applications, while silicon photonics can provide attractive solutions to perform highdensity communications. This paper presents an electro-optic transmitter operating at 20 Gbps (gigabit per second), as...

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Bibliographic Details
Published in:IEEE journal of selected topics in quantum electronics 2020-03, Vol.26 (2), p.1-10
Main Authors: Michard, Audrey, Carpentier, Jean-Francois, Michit, Nicolas, Le Maitre, Patrick, Benabes, Philippe, Ferreira, Pietro M.
Format: Article
Language:English
Subjects:
Bit error rate
chip-to-chip communication
CMOS
co-simulation
Computer simulation
Design optimization
Electronics
Energy consumption
Engineering Sciences
Erbium
hybrid integration
Mach-Zehnder interferometers
Mach-Zehnder modulator
Micro and nanotechnologies
Microelectronics
Modulation
Optical interconnections
Optical interconnects
Optical transmitters
Photonics
Power demand
Silicon photonics
Transmitters
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Summary:Designing high-speed and low-power interconnects is a challenge for high performance computing applications, while silicon photonics can provide attractive solutions to perform highdensity communications. This paper presents an electro-optic transmitter operating at 20 Gbps (gigabit per second), as a first step toward the demonstration of chip-to-chip optical links. The architecture is based on a dual-drive Mach-Zehnder interferometer co-integrated with a 55-nm CMOS driver. Design optimizations and trade-offs analysis enable low-energy and negligible bit error rate (BER
ISSN:1077-260X
1558-4542
DOI:10.1109/JSTQE.2019.2954705