Enhanced Ripple Blocker

The present paper introduces a Ripple blocker architecture having a high power supply rejection ratio, as the main feature. The specific performance circuit parameters, the block circuit, the main sub-circuits of the designed Ripple blocker together with the transistor level circuits are presented....

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Bibliographic Details
Main Authors: Bundaru, Madalina Elena, Dobrescu, D., Franti, E., Enachescu, M., Dascalu, M., Dobrescu, L.
Format: Conference Proceeding
Language:English
Subjects:
high PSRR
LDO
Power supplies
Regulators
Resistors
ripple blocker
System-on-chip
Transient analysis
Transistors
Voltage control
voltage regulator
Online Access:Request full text
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Description
Summary:The present paper introduces a Ripple blocker architecture having a high power supply rejection ratio, as the main feature. The specific performance circuit parameters, the block circuit, the main sub-circuits of the designed Ripple blocker together with the transistor level circuits are presented. The Ripple blocker is provided with a current sense circuit that ensures the capability to maintain the desired behavior with a wide range of load resistor values.
ISSN:2377-0678
DOI:10.1109/SMICND.2019.8923768