A Fast Response Output Buffer for an I2C High Speed Interface

An improved digital open drain output buffer is designed and implemented in a 0.18 \mu \mathrm{m} CMOS process. The circuit can operate in a wide range of power supply voltages, from 1.5V to 5.6V. This output buffer is used in an I 2 C High Speed Interface, allowing for a transmission rate of 3.4 Mb...

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Bibliographic Details
Main Authors: Dragan, Anca, Enache, Andrei, Negut, Alina, Tache, Adrian Macarie, Brezeanu, Gheorghe
Format: Conference Proceeding
Language:English
Subjects:
Clocks
Delays
I2C High Speed Interface
open drain stage
Protocols
Resistors
Switches
Transistors
wide voltage range
Online Access:Request full text
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Summary:An improved digital open drain output buffer is designed and implemented in a 0.18 \mu \mathrm{m} CMOS process. The circuit can operate in a wide range of power supply voltages, from 1.5V to 5.6V. This output buffer is used in an I 2 C High Speed Interface, allowing for a transmission rate of 3.4 Mbps, resulting in a data hold time of 39.4ns for 1.5V, and 30.4ns for 5.6V, respectively. These performances were achieved through topology changes to a classic digital open-drain buffer.
ISSN:2377-0678
DOI:10.1109/SMICND.2019.8924012