Performance Investigation of Gate-Engineered Recessed-S/D FDSOI MOSFETs for Low Power Analog/RF Applications

This paper explains the analog and RF performance of Gate-Engineered Recessed-Source/Drain (Re-S/D) Fully Depleted-Silicon on Insulator (FD-SOI) Metal Oxide Semiconductor Field Effect Transistor (MOSFET). Re-S/D MOSFET has excellent capability of reducing series resistance which in turns improves th...

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Bibliographic Details
Main Authors: Priya, Anjali, Srivastava, Nilesh Anand, Awadh Mishra, Ram
Format: Conference Proceeding
Language:English
Subjects:
Analog and RF FoMs
Cutoff frequency
Dual Metal
Fully-Depleted SOI
Logic gates
MOSFET
Performance evaluation
Radio frequency
Recessed-Source/Drain MOSFET
Silicon-on-insulator
Transconductance
Triple Metal
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Summary:This paper explains the analog and RF performance of Gate-Engineered Recessed-Source/Drain (Re-S/D) Fully Depleted-Silicon on Insulator (FD-SOI) Metal Oxide Semiconductor Field Effect Transistor (MOSFET). Re-S/D MOSFET has excellent capability of reducing series resistance which in turns improves the drive current capability and low leakages. In this paper, for the first time, the Analog and RF performance of Triple-Metal-Gate Re-S/D FD SOI MOSFET is analyzed to investigate the behavior of the device in Analog domain to be suggested for low power application. The device has been simulated using numerical 2-D device simulator from Silvaco ATLAS. The device performance has been evaluated with parameters such as drain current(I d ), transconductance(g m ), output conductance(g d ), device capacitance(C gs and C gd ), intrinsic gain(A v ), early voltage(V ea ), cut-off frequency(f T ), transconductance frequency product(TFP), gain frequency product (GFP) and gain transconductance frequency product (GTFP).
ISSN:2325-9418
DOI:10.1109/INDICON45594.2018.8987016