Backside Security Assessment of Modern SoCs

• Main Authors: Rahman, Mir Tanjidur, Asadizanjani, Navid
• Format: Conference Proceeding
• Language: English
• Subjects: Biomedical optical imaging; Optical imaging; Optical sensors; Photonics; Security; Stimulated emission; Transistors
• ISSN: 2332-5674
• DOI: 10.1109/MTV48867.2019.00012

A System-on-chip (SoC) accommodates differentsecurity-sensitive modules and information, collectively knownas assets. Protecting the assets from a malicious entity is thekey objective of the security architecture of the SoC. On theother hand, optical debugging and diagnosis based physicalinspection methods are widely used for defects and failureslocalization in silicon implementation. Transparency of silicon tonear-infrared (NIR) light is used for optical debugging purposes, e.g., photon emission analysis, laser-voltage probing/imaging, laser stimulation. The mentioned above semi-/non-invasive opticalapproaches allow run-time monitoring of the transistor througha silicon substrate, i.e., chip backside. Besides, to facilitate thefailure analysis, no protection scheme is implemented at theSoC backside. Therefore, an attacker can effortlessly track andextract the chip assets by optically attacking the security-sensitivemodules. Thus, the silicon substrate appears as the new "back-door" for SoC security. Though different countermeasures havebeen proposed, none proved to be impeccable against differentclasses of optical attacks. Therefore, to identify the attack surfacefor optical attacks, we surveyed the security threat imposed byvarious optical attacks. Based on the capability and chip designasset availability, we have also classified the potential adversariesto exploit the semi-invasive optical techniques. Finally, we turnedour focus about the threat of optical attacks in the existingand emerging smaller technology nodes and concluded withsuggestions for future research direction.