Dynamic CGD and dV/dt in Superjunction MOSFETs

As the dimensions of the power metal-semiconductor field-effect transistor (MOSFET) are scaling down, and the output capacitance is considerably reduced, the fast dV/dt becomes an issue and can trigger severe oscillations during hard switching. To understand the origin of the dV/dt and the induced g...

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Bibliographic Details
Published in:IEEE transactions on electron devices 2020-04, p.1-7
Main Authors: Kang, H., Udrea, F.
Format: Article
Language:English
Subjects:
Capacitance
Current density
Doping
dV/dt
dynamic capacitance
Logic gates
MOSFET
power metal-semiconductor field-effect transistor (MOSFET)
superjunction (SJ)
Switches
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Summary:As the dimensions of the power metal-semiconductor field-effect transistor (MOSFET) are scaling down, and the output capacitance is considerably reduced, the fast dV/dt becomes an issue and can trigger severe oscillations during hard switching. To understand the origin of the dV/dt and the induced gate oscillations, the intricate link between the device operation and the circuit conditions is required. In this article, the dynamic gate-to-drain capacitance, CGD, is extracted by employing a five-terminal method. Through the use of simulations, the relationship between CGD and the induced gate oscillations is explored. In addition to this, the 2-D depletion behavior in a superjunction system, which affects the dynamic CGD, is investigated.
ISSN:0018-9383
1557-9646
DOI:10.1109/TED.2020.2974853