Optimizing a discrete switching pattern using two simulated annealing algorithms

In many applications, the output waveform of an inverter must be sinusoidal. However, the output also contains low and high order harmonics due to switching. As an alternative to analog PWM, a digital basis can be established for the switching sequence. The desired sinusoidal period is divided into...

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Bibliographic Details
Main Authors: Bina, M.T., Hamill, D.C.
Format: Conference Proceeding
Language:English
Subjects:
Constraint optimization
Frequency
Inductance
Inductors
Power harmonic filters
Power system harmonics
Pulse width modulation
Pulse width modulation inverters
Simulated annealing
Switching loss
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Summary:In many applications, the output waveform of an inverter must be sinusoidal. However, the output also contains low and high order harmonics due to switching. As an alternative to analog PWM, a digital basis can be established for the switching sequence. The desired sinusoidal period is divided into N intervals, each taking the value '+1' or '-1' to form a bit-string. In this paper, simulated annealing (SA) is employed to choose a bit-string which optimizes the harmonic performance, subject to constraints. The method is applied to a new FACTS controller, the bootstrap variable inductance (BVI). Next, to obviate the complicated and slow SA algorithm, a new simplified simulated annealing (SSA) algorithm is developed and applied to the BVI. Finally, the harmonic structures of the switching sequences generated by SA, SSA, and PWM are compared.
DOI:10.1109/CIPE.2000.904704