Synchronization in Networks of Time-to-Digital Converters based on Field Programmable Gate Arrays

• Main Authors: Garzetti, F., Lusardi, N., Corna, N., Geraci, A.
• Format: Conference Proceeding
• Language: English
• Subjects: Delay-Line (DL); Field Programmable Gate Array (FPGA); Field programmable gate arrays; Instruments; Jitter; Logic gates; Network; Network topology; Synchronization; System-on-Chip (SoC); Tapped Delay-Line (TDL); Time-to-Digital Converter (TDC)
• ISSN: 2577-0829
• DOI: 10.1109/NSS/MIC42101.2019.9059786

Nowadays, in many high technological fields of research the classical Time-to-Digital-Converter (TDC) structure is no more satisfactory, since the architecture of one measuring unit connected to many sensors is no more feasible because the not sufficient number of channels, the lack of flexibility or both. This is the case, for instance, of Positron Emission Tomography (PET) facilities of last generation.In the Nuclear Science Symposium 2018 we presented a "All-Digital Fully-Configurable Instrument for Multi-Channel Time Measurements at High Performance". The present contribution deals with the implementation of a distributed architecture of TDCs, i.e. an instrument that allows measuring timestamps on different devices but with the same relative time reference. This allows managing measures performed by different TDCs like if they were collected by a unique device, so providing a huge flexibility that opens the way for new advanced applications like PET network detectors.The realization of a network for TDCs poses two main issues: a high-performance data transfer mechanism in addition to a precise and reliable synchronization methodology. This contribution focuses on the latter issue that is the most critical and complex to address. The analysis is carried out both from theoretical and implementation point of view.