13.2 A 1Tb 4b/Cell 96-Stacked-WL 3D NAND Flash Memory with 30MB/s Program Throughput Using Peripheral Circuit Under Memory Cell Array Technique

Ever since a 3b/cell (TLC) NAND Flash memory became the mainstream in nonvolatile memory market, a new demand for a 4b/cell (QLC) NAND flash memory has been emerging for low-cost applications. However, QLC has inherently much longer page program time than TLC because of 16-state programming within a...

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Main Authors: Huh, Hwang, Cho, Wanik, Lee, Jinhaeng, Noh, Yujong, Park, Yongsoon, Ok, Sunghwa, Kim, Jongwoo, Cho, Kayoung, Lee, Hyunchul, Kim, Geonu, Park, Kangwoo, Kim, Kwanho, Lee, Heejoo, Chai, Sooyeol, Kwon, Chankeun, Cho, Hanna, Jeong, Chanhui, Yang, Yujin, Goo, Jayoon, Park, Jangwon, Lee, Juhyeong, Kirr, Heonki, Jo, Kangwook, Park, Cheoljoong, Nam, Hyeonsu, Song, Hyunseok, Lee, Sangkyu, Jeong, Woopyo, Ahn, Kun-Ok, Jung, Tae-Sung
Format: Conference Proceeding
Language:English
Subjects:
Computer architecture
Couplings
Flash memories
Microprocessors
Sensors
Three-dimensional displays
Throughput
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Summary:Ever since a 3b/cell (TLC) NAND Flash memory became the mainstream in nonvolatile memory market, a new demand for a 4b/cell (QLC) NAND flash memory has been emerging for low-cost applications. However, QLC has inherently much longer page program time than TLC because of 16-state programming within a limited program and erase (PE) window, as well as narrower V th distributions. The longer page-program time, subsequently, degrades sequential write performance. Thus it is not possible to meet the required sequential-write performance in applications such as mobile devices and solid state drives (SSDs).
ISSN:2376-8606
DOI:10.1109/ISSCC19947.2020.9063117