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On the Pole-Placement Technique for the Design of a DC-DC Buck Converter Discrete PID Control

This paper proposes a pole-placement method for tuning the discrete PID control of a DC-DC Buck converter that ensure specific time-domain performances when a step disturbance in the input voltage or load is applied. The control is also designed to reduce steady-state oscillations caused by the digi...

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Main Authors: Andries, Vasilica-Daniela, Goras, Liviu, David, Emilian, Buzo, Andi, Pelz, Georg
Format: Conference Proceeding
Language:English
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creator Andries, Vasilica-Daniela
Goras, Liviu
David, Emilian
Buzo, Andi
Pelz, Georg
description This paper proposes a pole-placement method for tuning the discrete PID control of a DC-DC Buck converter that ensure specific time-domain performances when a step disturbance in the input voltage or load is applied. The control is also designed to reduce steady-state oscillations caused by the digital implementation nonlinearities of the control loop. The effectiveness of the method is verified on both simulation and experimental levels.
doi_str_mv 10.1109/DDECS50862.2020.9095562
format conference_proceeding
fullrecord <record><control><sourceid>ieee_CHZPO</sourceid><recordid>TN_cdi_ieee_primary_9095562</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>9095562</ieee_id><sourcerecordid>9095562</sourcerecordid><originalsourceid>FETCH-LOGICAL-i203t-a40845e04b518d10112b0c84d0495c987e527b9a3f0a46b2726e2c7aa8b6b04c3</originalsourceid><addsrcrecordid>eNotkMFOwzAQRA0SEqX0CzjgH0hYb-zYPkJcoFKlVqIcUeW4GxpIE3BSJP6eAj2NZvT0DsPYtYBUCLA3zk2LJwUmxxQBIbVglcrxhF0IjUZYmxl9ykYodZagEPqcTfr-DQBEfqhWj9jLouXDlviyayhZNj7QjtqBryhs2_pzT7zq4h_gqK9fW95V3HNXJK7gd_vwzouu_aI4UOSu7kOk4aCaud95iF1zyc4q3_Q0OeaYPd9PV8VjMl88zIrbeVIjZEPiJRipCGSphNkIEAJLCEZuQFoVrNGkUJfWZxV4mZeoMScM2ntT5iXIkI3Z1b-3JqL1R6x3Pn6vj29kP9YvUl8</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>On the Pole-Placement Technique for the Design of a DC-DC Buck Converter Discrete PID Control</title><source>IEEE Xplore All Conference Series</source><creator>Andries, Vasilica-Daniela ; Goras, Liviu ; David, Emilian ; Buzo, Andi ; Pelz, Georg</creator><creatorcontrib>Andries, Vasilica-Daniela ; Goras, Liviu ; David, Emilian ; Buzo, Andi ; Pelz, Georg</creatorcontrib><description>This paper proposes a pole-placement method for tuning the discrete PID control of a DC-DC Buck converter that ensure specific time-domain performances when a step disturbance in the input voltage or load is applied. The control is also designed to reduce steady-state oscillations caused by the digital implementation nonlinearities of the control loop. The effectiveness of the method is verified on both simulation and experimental levels.</description><identifier>EISSN: 2473-2117</identifier><identifier>EISBN: 1728199387</identifier><identifier>EISBN: 9781728199382</identifier><identifier>DOI: 10.1109/DDECS50862.2020.9095562</identifier><language>eng</language><publisher>IEEE</publisher><subject>DC-DC Buck converter ; discrete PID ; disturbance rejection ; limit-cycle oscillations ; pole-pĺacement method</subject><ispartof>2020 23rd International Symposium on Design and Diagnostics of Electronic Circuits &amp; Systems (DDECS), 2020, p.1-4</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/9095562$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,780,784,789,790,23930,23931,25140,27925,54555,54932</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/9095562$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Andries, Vasilica-Daniela</creatorcontrib><creatorcontrib>Goras, Liviu</creatorcontrib><creatorcontrib>David, Emilian</creatorcontrib><creatorcontrib>Buzo, Andi</creatorcontrib><creatorcontrib>Pelz, Georg</creatorcontrib><title>On the Pole-Placement Technique for the Design of a DC-DC Buck Converter Discrete PID Control</title><title>2020 23rd International Symposium on Design and Diagnostics of Electronic Circuits &amp; Systems (DDECS)</title><addtitle>DDECS</addtitle><description>This paper proposes a pole-placement method for tuning the discrete PID control of a DC-DC Buck converter that ensure specific time-domain performances when a step disturbance in the input voltage or load is applied. The control is also designed to reduce steady-state oscillations caused by the digital implementation nonlinearities of the control loop. The effectiveness of the method is verified on both simulation and experimental levels.</description><subject>DC-DC Buck converter</subject><subject>discrete PID</subject><subject>disturbance rejection</subject><subject>limit-cycle oscillations</subject><subject>pole-pĺacement method</subject><issn>2473-2117</issn><isbn>1728199387</isbn><isbn>9781728199382</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2020</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><recordid>eNotkMFOwzAQRA0SEqX0CzjgH0hYb-zYPkJcoFKlVqIcUeW4GxpIE3BSJP6eAj2NZvT0DsPYtYBUCLA3zk2LJwUmxxQBIbVglcrxhF0IjUZYmxl9ykYodZagEPqcTfr-DQBEfqhWj9jLouXDlviyayhZNj7QjtqBryhs2_pzT7zq4h_gqK9fW95V3HNXJK7gd_vwzouu_aI4UOSu7kOk4aCaud95iF1zyc4q3_Q0OeaYPd9PV8VjMl88zIrbeVIjZEPiJRipCGSphNkIEAJLCEZuQFoVrNGkUJfWZxV4mZeoMScM2ntT5iXIkI3Z1b-3JqL1R6x3Pn6vj29kP9YvUl8</recordid><startdate>202004</startdate><enddate>202004</enddate><creator>Andries, Vasilica-Daniela</creator><creator>Goras, Liviu</creator><creator>David, Emilian</creator><creator>Buzo, Andi</creator><creator>Pelz, Georg</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>202004</creationdate><title>On the Pole-Placement Technique for the Design of a DC-DC Buck Converter Discrete PID Control</title><author>Andries, Vasilica-Daniela ; Goras, Liviu ; David, Emilian ; Buzo, Andi ; Pelz, Georg</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i203t-a40845e04b518d10112b0c84d0495c987e527b9a3f0a46b2726e2c7aa8b6b04c3</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2020</creationdate><topic>DC-DC Buck converter</topic><topic>discrete PID</topic><topic>disturbance rejection</topic><topic>limit-cycle oscillations</topic><topic>pole-pĺacement method</topic><toplevel>online_resources</toplevel><creatorcontrib>Andries, Vasilica-Daniela</creatorcontrib><creatorcontrib>Goras, Liviu</creatorcontrib><creatorcontrib>David, Emilian</creatorcontrib><creatorcontrib>Buzo, Andi</creatorcontrib><creatorcontrib>Pelz, Georg</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library Online</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Andries, Vasilica-Daniela</au><au>Goras, Liviu</au><au>David, Emilian</au><au>Buzo, Andi</au><au>Pelz, Georg</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>On the Pole-Placement Technique for the Design of a DC-DC Buck Converter Discrete PID Control</atitle><btitle>2020 23rd International Symposium on Design and Diagnostics of Electronic Circuits &amp; Systems (DDECS)</btitle><stitle>DDECS</stitle><date>2020-04</date><risdate>2020</risdate><spage>1</spage><epage>4</epage><pages>1-4</pages><eissn>2473-2117</eissn><eisbn>1728199387</eisbn><eisbn>9781728199382</eisbn><abstract>This paper proposes a pole-placement method for tuning the discrete PID control of a DC-DC Buck converter that ensure specific time-domain performances when a step disturbance in the input voltage or load is applied. The control is also designed to reduce steady-state oscillations caused by the digital implementation nonlinearities of the control loop. The effectiveness of the method is verified on both simulation and experimental levels.</abstract><pub>IEEE</pub><doi>10.1109/DDECS50862.2020.9095562</doi><tpages>4</tpages></addata></record>
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source IEEE Xplore All Conference Series
subjects DC-DC Buck converter
discrete PID
disturbance rejection
limit-cycle oscillations
pole-pĺacement method
title On the Pole-Placement Technique for the Design of a DC-DC Buck Converter Discrete PID Control
url http://sfxeu10.hosted.exlibrisgroup.com/loughborough?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-24T19%3A23%3A25IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_CHZPO&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=On%20the%20Pole-Placement%20Technique%20for%20the%20Design%20of%20a%20DC-DC%20Buck%20Converter%20Discrete%20PID%20Control&rft.btitle=2020%2023rd%20International%20Symposium%20on%20Design%20and%20Diagnostics%20of%20Electronic%20Circuits%20&%20Systems%20(DDECS)&rft.au=Andries,%20Vasilica-Daniela&rft.date=2020-04&rft.spage=1&rft.epage=4&rft.pages=1-4&rft.eissn=2473-2117&rft_id=info:doi/10.1109/DDECS50862.2020.9095562&rft.eisbn=1728199387&rft.eisbn_list=9781728199382&rft_dat=%3Cieee_CHZPO%3E9095562%3C/ieee_CHZPO%3E%3Cgrp_id%3Ecdi_FETCH-LOGICAL-i203t-a40845e04b518d10112b0c84d0495c987e527b9a3f0a46b2726e2c7aa8b6b04c3%3C/grp_id%3E%3Coa%3E%3C/oa%3E%3Curl%3E%3C/url%3E&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=9095562&rfr_iscdi=true