A 64-min single-chip voice recorder/player using embedded 4-b/cell flash memory

A system-on-chip prototype implementing a full integration of a 64-minute digital voice recorder/player and embedding a 4-b/cell multilevel digital flash memory is presented in this paper. A hardwired adaptive-differential pulse-code modulation speech coder/decoder (8 to 40 kb/s) and a microcontroll...

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Bibliographic Details
Published in:IEEE journal of solid-state circuits 2001-03, Vol.36 (3), p.516-521
Main Authors: Borgatti, M., Rocchi, A., Bisio, M., Besana, M., Navoni, L., Rolandi, P.L.
Format: Article
Language:English
Subjects:
Architecture
Computer architecture
Decoding
Digital
Flash memory
Flash memory (computers)
Hardware
IP (Internet Protocol)
Microcontrollers
Modulation coding
Multilevel
Players
Prototypes
Pulse modulation
Speech
System-on-a-chip
Voice recorders
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Summary:A system-on-chip prototype implementing a full integration of a 64-minute digital voice recorder/player and embedding a 4-b/cell multilevel digital flash memory is presented in this paper. A hardwired adaptive-differential pulse-code modulation speech coder/decoder (8 to 40 kb/s) and a microcontroller are integrated into a bus-centric architecture. An 8-Mcell/32-Mb multilevel flash memory is used as an embedded mass storage media and a fully digital on-chip built-in-self-test solution is presented. This speech recording system features a modular architecture allowing full reuse and mix-and-match of its IP building blocks. The architecture of the system and solutions for implementing embedded multilevel flash memories are presented. System operation modes are described showing how the desired message editing functionality is implemented by a mixed hardware/software solution. The chip is 3-V-only and it counts 13 M transistors at 225 mm/sup 2/ area in a 0.5-/spl mu/m embedded flash technology.
ISSN:0018-9200
1558-173X
DOI:10.1109/4.910491