Analysis of BTI, SHE Induced BTI and HCD Under Full VG/VD Space in GAA Nano-Sheet N and P FETs

An ultrafast (10ps delay) characterization method is used to measure threshold voltage shift (ΔV T ) owing to Bias Temperature Instability (BTI) and Hot Carrier Degradation (HCD) stress in N and P channel Gate All Around (GAA) NSFETs. ΔV T time kinetics at various gate bias (V G ) and temperature (T...

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Bibliographic Details
Main Authors: Choudhury, Nilotpal, Sharma, Uma, Zhou, Huimei, Southwick, Richard G., Wang, Miaomiao, Mahapatra, Souvik
Format: Conference Proceeding
Language:English
Subjects:
BTI Analysis Tool (BAT)
Field effect transistors
GAA
Gallium arsenide
HCD
Logic gates
Nanosheet Field Effect Transistor (NSFET)
NBTI
Negative bias temperature instability
PBTI
Temperature measurement
Thermal variables control
Voltage measurement
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Summary:An ultrafast (10ps delay) characterization method is used to measure threshold voltage shift (ΔV T ) owing to Bias Temperature Instability (BTI) and Hot Carrier Degradation (HCD) stress in N and P channel Gate All Around (GAA) NSFETs. ΔV T time kinetics at various gate bias (V G ) and temperature (T) for BTI and at various VG and drain bias (V D ) for HCD is analyzed. Contribution from Self Heat Effect (SHE) induced BTI to overall HCD is estimated under full V G /V D space and pure HCD contribution is determined.
ISSN:1938-1891
DOI:10.1109/IRPS45951.2020.9128310