MBIST Support for Reliable eMRAM Sensing

eMRAM (embedded Magnetoresistive Random Access Memory) is an attractive solution in many non-volatile memory applications because of its small size, fast operation speed, and good endurance. However, due to a relatively small on/off resistance separation, it is a challenge to set an optimal referenc...

Full description

Saved in:
Bibliographic Details
Main Authors: Yun, Jongsin, Nadeau-Dostie, Benoit, Keim, Martin, Dray, Cyrille, Boujamaa, Mehdi
Format: Conference Proceeding
Language:English
Subjects:
Built-in self-test
Maintenance engineering
MRAM
Nonvolatile memory
Power capacitors
Random access memory
read operation
Resistance
System-on-chip
trim
yield
Online Access:Request full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:eMRAM (embedded Magnetoresistive Random Access Memory) is an attractive solution in many non-volatile memory applications because of its small size, fast operation speed, and good endurance. However, due to a relatively small on/off resistance separation, it is a challenge to set an optimal reference resistance to reliably differentiate between a read memory data "1" and "0". Several trimming circuits are described in the literature to finely adjust a reference resistance value. These circuits are controlled from chip inputs causing time-consuming tests and off-chip engineering analysis. This paper presents a fully automated on-chip trimming process leveraging existing memory BIST (Built-In Self-Test) resources. It analyzes a massive amount of array property data with a minimal number of tests and optimizes the reference trim settings on-chip without the need for any external intervention.
ISSN:1558-1780
DOI:10.1109/ETS48528.2020.9131564