A 3.3-V CMOS 10.7-MHz sixth-order bandpass /spl Sigma//spl Delta/ modulator with 74-dB dynamic range

A 3.3-V bandpass /spl Sigma//spl Delta/ modulator for IF sampling at 10.7 MHz in digital radio applications has been developed. The modulator presents a sixth-order single-loop architecture and features a 74-dB dynamic range in a 2OO-kHz signal bandwidth (FM signal), while for a 9-kHz signal bandwid...

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Bibliographic Details
Published in:IEEE journal of solid-state circuits 2001-04, Vol.36 (4), p.629-638
Main Authors: Cusinato, P., Tonietto, D., Stefani, F., Baschirotto, A.
Format: Article
Language:English
Subjects:
Analog-digital conversion
Bandwidth
Baseband
CMOS technology
Delta modulation
Digital communication
Digital modulation
Dynamic range
Receivers
Sampling methods
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Description
Summary:A 3.3-V bandpass /spl Sigma//spl Delta/ modulator for IF sampling at 10.7 MHz in digital radio applications has been developed. The modulator presents a sixth-order single-loop architecture and features a 74-dB dynamic range in a 2OO-kHz signal bandwidth (FM signal), while for a 9-kHz signal bandwidth (AM signal) the dynamic range is 88 dB. The modulator has been integrated in a standard 0.35-/spl mu/m CMOS technology using switched-capacitor technique and consumes 76 mW from a single 3.3V supply.
ISSN:0018-9200
1558-173X
DOI:10.1109/4.913741