Power aware microarchitecture resource scaling

In this paper we present a strategy for run-time profiling to optimize the configuration of a microprocessor dynamically so as to save power with minimum performance penalty. The configuration of the processor changes according to the parallelism in the running program. Experiments on some benchmark...

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Bibliographic Details
Main Authors: Iyer, A., Marculescu, D.
Format: Conference Proceeding
Language:English
Subjects:
Electronic design automation and methodology
Energy consumption
Energy management
Microarchitecture
Microprocessors
Mobile computing
Power system management
Process design
Runtime
Thermal management
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Summary:In this paper we present a strategy for run-time profiling to optimize the configuration of a microprocessor dynamically so as to save power with minimum performance penalty. The configuration of the processor changes according to the parallelism in the running program. Experiments on some benchmark programs show good savings in total energy consumption; we have observed a decrease of up to 23% in energy/cycle and up to 8% in energy per instruction. Our proposed approach can be used for energy-aware computing in either portable applications or in desktop environments where power density is becoming a concern. This approach can also be incorporated in larger power management strategies like ACPI.
ISSN:1530-1591
1558-1101
DOI:10.1109/DATE.2001.915023