Efficient on-line testing method for a floating-point adder

In this paper we present a residue method for on-line testing of the floating-point adder. This circuit contains arithmetic shifter which executes an abridged operation. In the method the problem of the abridged operation checking with the reduced hardware amount is solved.

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Bibliographic Details
Main Authors: Drozd, A., Lobachev, M.
Format: Conference Proceeding
Language:English
Subjects:
Adders
Circuit testing
Digital arithmetic
Floating-point arithmetic
Hardware
Multiplexing
System testing
Online Access:Request full text
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Description
Summary:In this paper we present a residue method for on-line testing of the floating-point adder. This circuit contains arithmetic shifter which executes an abridged operation. In the method the problem of the abridged operation checking with the reduced hardware amount is solved.
ISSN:1530-1591
1558-1101
DOI:10.1109/DATE.2001.915042