Vertical Power SiC MOSFETs with High-k Gate Dielectrics and Superior Threshold Voltage Stability

Despite the recent progress in SiC power MOSFET technology and its commercialization, the defective MOS interface still hampers the exploitation of the full potential of these devices. We present results using our high-k gate stack technology that shows significantly reduced density of interface sta...

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Bibliographic Details
Main Authors: Wirths, Stephan, Arango, Yulieth, Mihaila, Andrei, Bellini, Marco, Romano, Gianpaolo, Alfieri, Giovanni, Belanche, Manuel, Knoll, Lars, Bianda, Enea, Mengotti, Elena
Format: Conference Proceeding
Language:English
Subjects:
1.2kV MOSFETs
Current measurement
High-k
Logic gates
MOSFET
Semiconductor device measurement
SiC
SiC power MOSFETs
Silicon carbide
Switches
Threshold voltage
Wide Band Gap
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Summary:Despite the recent progress in SiC power MOSFET technology and its commercialization, the defective MOS interface still hampers the exploitation of the full potential of these devices. We present results using our high-k gate stack technology that shows significantly reduced density of interface states (D it ) along with superior threshold voltage (V TH ) stability for low voltage SiC power MOSFETs. The findings indicate virtually no V TH -shift during static characterization as function of the starting gate voltage and its ramp. Furthermore, dynamic switching results show virtually no threshold voltage shift for V_{GS,start} \gt -12V.
ISSN:1946-0201
DOI:10.1109/ISPSD46842.2020.9170122