A 0.6dB NF, 12dBm IIP3, 4.6-6GHz LNA in 0.13μm Floating-Body SOI CMOS

A broadband linear 5.2 GHz CMOS LNA on 130nm Tower SOI process with record 0.6 dB noise-figure, 12dBm IIP3 and 10.4dB gain is demonstrated. Using on-chip high Q inductors on high resistive SOI and bias optimization of floating body transistor, the record noise figure with high IIP3 is achieved. Usin...

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Bibliographic Details
Main Authors: Jha, Amit, Zheng, Jie, Masse, Chris, Hurwitz, Paul, Chaudhry, Samir
Format: Conference Proceeding
Language:English
Subjects:
Broadband communication
CMOS
floating-body transistor
IIP3
Inductors
LNA
Poles and towers
Power demand
SOI
System-on-chip
Transistors
Wireless LAN
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Summary:A broadband linear 5.2 GHz CMOS LNA on 130nm Tower SOI process with record 0.6 dB noise-figure, 12dBm IIP3 and 10.4dB gain is demonstrated. Using on-chip high Q inductors on high resistive SOI and bias optimization of floating body transistor, the record noise figure with high IIP3 is achieved. Using a 1V supply, the circuit consumes 10mW power and is suitable for 802.11ax/ac/n WLAN applications. The LNA is matched at input and output from 4.6-6GHz using on-chip inductors. The LNA achieves highest figure of merits, FOM2 & FOM3 when compared to state-of-the-art measured LNAs.
ISSN:1558-3899
DOI:10.1109/MWSCAS48704.2020.9184432