Loading…
A 0.6dB NF, 12dBm IIP3, 4.6-6GHz LNA in 0.13μm Floating-Body SOI CMOS
A broadband linear 5.2 GHz CMOS LNA on 130nm Tower SOI process with record 0.6 dB noise-figure, 12dBm IIP3 and 10.4dB gain is demonstrated. Using on-chip high Q inductors on high resistive SOI and bias optimization of floating body transistor, the record noise figure with high IIP3 is achieved. Usin...
Saved in:
Main Authors: | , , , , |
---|---|
Format: | Conference Proceeding |
Language: | English |
Subjects: | |
Online Access: | Request full text |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
cited_by | |
---|---|
cites | |
container_end_page | 124 |
container_issue | |
container_start_page | 121 |
container_title | |
container_volume | |
creator | Jha, Amit Zheng, Jie Masse, Chris Hurwitz, Paul Chaudhry, Samir |
description | A broadband linear 5.2 GHz CMOS LNA on 130nm Tower SOI process with record 0.6 dB noise-figure, 12dBm IIP3 and 10.4dB gain is demonstrated. Using on-chip high Q inductors on high resistive SOI and bias optimization of floating body transistor, the record noise figure with high IIP3 is achieved. Using a 1V supply, the circuit consumes 10mW power and is suitable for 802.11ax/ac/n WLAN applications. The LNA is matched at input and output from 4.6-6GHz using on-chip inductors. The LNA achieves highest figure of merits, FOM2 & FOM3 when compared to state-of-the-art measured LNAs. |
doi_str_mv | 10.1109/MWSCAS48704.2020.9184432 |
format | conference_proceeding |
fullrecord | <record><control><sourceid>ieee_CHZPO</sourceid><recordid>TN_cdi_ieee_primary_9184432</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>9184432</ieee_id><sourcerecordid>9184432</sourcerecordid><originalsourceid>FETCH-LOGICAL-i133t-157f6282c6af47244927d1ef219b8f998d8c2431017617b7b074a3970d9880da3</originalsourceid><addsrcrecordid>eNotj0FKw0AUQEdBsK2ewM0coBP_n5nM_FkmwbSBtBGiuCyTTiKRppWmm3o2z-CZFOzqbR4PHmMcIUIE97h6q7Ok1mRBRxIkRA5JayWv2BStJCSIyV2zCcYxCUXO3bLpOH4ASGXRTViecIhMSPk6n3OUIR14UTyrOdeREWax_OLlOuH9_s9C9fM98Hx38Kd-_y7SQzjzuip4tqrqO3bT-d3Y3l84Y6_500u2FGW1KLKkFD0qdRIY285IklvjO22l1k7agG0n0TXUOUeBtlIrBLQGbWMbsNorZyE4IghezdjDf7dv23bzeewHfzxvLs_qF1XcRSg</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>A 0.6dB NF, 12dBm IIP3, 4.6-6GHz LNA in 0.13μm Floating-Body SOI CMOS</title><source>IEEE Xplore All Conference Series</source><creator>Jha, Amit ; Zheng, Jie ; Masse, Chris ; Hurwitz, Paul ; Chaudhry, Samir</creator><creatorcontrib>Jha, Amit ; Zheng, Jie ; Masse, Chris ; Hurwitz, Paul ; Chaudhry, Samir</creatorcontrib><description>A broadband linear 5.2 GHz CMOS LNA on 130nm Tower SOI process with record 0.6 dB noise-figure, 12dBm IIP3 and 10.4dB gain is demonstrated. Using on-chip high Q inductors on high resistive SOI and bias optimization of floating body transistor, the record noise figure with high IIP3 is achieved. Using a 1V supply, the circuit consumes 10mW power and is suitable for 802.11ax/ac/n WLAN applications. The LNA is matched at input and output from 4.6-6GHz using on-chip inductors. The LNA achieves highest figure of merits, FOM2 & FOM3 when compared to state-of-the-art measured LNAs.</description><identifier>EISSN: 1558-3899</identifier><identifier>EISBN: 1728180589</identifier><identifier>EISBN: 9781728180588</identifier><identifier>DOI: 10.1109/MWSCAS48704.2020.9184432</identifier><language>eng</language><publisher>IEEE</publisher><subject>Broadband communication ; CMOS ; floating-body transistor ; IIP3 ; Inductors ; LNA ; Poles and towers ; Power demand ; SOI ; System-on-chip ; Transistors ; Wireless LAN</subject><ispartof>2020 IEEE 63rd International Midwest Symposium on Circuits and Systems (MWSCAS), 2020, p.121-124</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/9184432$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,776,780,785,786,23910,23911,25119,27904,54534,54911</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/9184432$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Jha, Amit</creatorcontrib><creatorcontrib>Zheng, Jie</creatorcontrib><creatorcontrib>Masse, Chris</creatorcontrib><creatorcontrib>Hurwitz, Paul</creatorcontrib><creatorcontrib>Chaudhry, Samir</creatorcontrib><title>A 0.6dB NF, 12dBm IIP3, 4.6-6GHz LNA in 0.13μm Floating-Body SOI CMOS</title><title>2020 IEEE 63rd International Midwest Symposium on Circuits and Systems (MWSCAS)</title><addtitle>MWSCAS</addtitle><description>A broadband linear 5.2 GHz CMOS LNA on 130nm Tower SOI process with record 0.6 dB noise-figure, 12dBm IIP3 and 10.4dB gain is demonstrated. Using on-chip high Q inductors on high resistive SOI and bias optimization of floating body transistor, the record noise figure with high IIP3 is achieved. Using a 1V supply, the circuit consumes 10mW power and is suitable for 802.11ax/ac/n WLAN applications. The LNA is matched at input and output from 4.6-6GHz using on-chip inductors. The LNA achieves highest figure of merits, FOM2 & FOM3 when compared to state-of-the-art measured LNAs.</description><subject>Broadband communication</subject><subject>CMOS</subject><subject>floating-body transistor</subject><subject>IIP3</subject><subject>Inductors</subject><subject>LNA</subject><subject>Poles and towers</subject><subject>Power demand</subject><subject>SOI</subject><subject>System-on-chip</subject><subject>Transistors</subject><subject>Wireless LAN</subject><issn>1558-3899</issn><isbn>1728180589</isbn><isbn>9781728180588</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2020</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><recordid>eNotj0FKw0AUQEdBsK2ewM0coBP_n5nM_FkmwbSBtBGiuCyTTiKRppWmm3o2z-CZFOzqbR4PHmMcIUIE97h6q7Ok1mRBRxIkRA5JayWv2BStJCSIyV2zCcYxCUXO3bLpOH4ASGXRTViecIhMSPk6n3OUIR14UTyrOdeREWax_OLlOuH9_s9C9fM98Hx38Kd-_y7SQzjzuip4tqrqO3bT-d3Y3l84Y6_500u2FGW1KLKkFD0qdRIY285IklvjO22l1k7agG0n0TXUOUeBtlIrBLQGbWMbsNorZyE4IghezdjDf7dv23bzeewHfzxvLs_qF1XcRSg</recordid><startdate>202008</startdate><enddate>202008</enddate><creator>Jha, Amit</creator><creator>Zheng, Jie</creator><creator>Masse, Chris</creator><creator>Hurwitz, Paul</creator><creator>Chaudhry, Samir</creator><general>IEEE</general><scope>6IE</scope><scope>6IH</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIO</scope></search><sort><creationdate>202008</creationdate><title>A 0.6dB NF, 12dBm IIP3, 4.6-6GHz LNA in 0.13μm Floating-Body SOI CMOS</title><author>Jha, Amit ; Zheng, Jie ; Masse, Chris ; Hurwitz, Paul ; Chaudhry, Samir</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i133t-157f6282c6af47244927d1ef219b8f998d8c2431017617b7b074a3970d9880da3</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2020</creationdate><topic>Broadband communication</topic><topic>CMOS</topic><topic>floating-body transistor</topic><topic>IIP3</topic><topic>Inductors</topic><topic>LNA</topic><topic>Poles and towers</topic><topic>Power demand</topic><topic>SOI</topic><topic>System-on-chip</topic><topic>Transistors</topic><topic>Wireless LAN</topic><toplevel>online_resources</toplevel><creatorcontrib>Jha, Amit</creatorcontrib><creatorcontrib>Zheng, Jie</creatorcontrib><creatorcontrib>Masse, Chris</creatorcontrib><creatorcontrib>Hurwitz, Paul</creatorcontrib><creatorcontrib>Chaudhry, Samir</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan (POP) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Xplore (Online service)</collection><collection>IEEE Proceedings Order Plans (POP) 1998-present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Jha, Amit</au><au>Zheng, Jie</au><au>Masse, Chris</au><au>Hurwitz, Paul</au><au>Chaudhry, Samir</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>A 0.6dB NF, 12dBm IIP3, 4.6-6GHz LNA in 0.13μm Floating-Body SOI CMOS</atitle><btitle>2020 IEEE 63rd International Midwest Symposium on Circuits and Systems (MWSCAS)</btitle><stitle>MWSCAS</stitle><date>2020-08</date><risdate>2020</risdate><spage>121</spage><epage>124</epage><pages>121-124</pages><eissn>1558-3899</eissn><eisbn>1728180589</eisbn><eisbn>9781728180588</eisbn><abstract>A broadband linear 5.2 GHz CMOS LNA on 130nm Tower SOI process with record 0.6 dB noise-figure, 12dBm IIP3 and 10.4dB gain is demonstrated. Using on-chip high Q inductors on high resistive SOI and bias optimization of floating body transistor, the record noise figure with high IIP3 is achieved. Using a 1V supply, the circuit consumes 10mW power and is suitable for 802.11ax/ac/n WLAN applications. The LNA is matched at input and output from 4.6-6GHz using on-chip inductors. The LNA achieves highest figure of merits, FOM2 & FOM3 when compared to state-of-the-art measured LNAs.</abstract><pub>IEEE</pub><doi>10.1109/MWSCAS48704.2020.9184432</doi><tpages>4</tpages></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | EISSN: 1558-3899 |
ispartof | 2020 IEEE 63rd International Midwest Symposium on Circuits and Systems (MWSCAS), 2020, p.121-124 |
issn | 1558-3899 |
language | eng |
recordid | cdi_ieee_primary_9184432 |
source | IEEE Xplore All Conference Series |
subjects | Broadband communication CMOS floating-body transistor IIP3 Inductors LNA Poles and towers Power demand SOI System-on-chip Transistors Wireless LAN |
title | A 0.6dB NF, 12dBm IIP3, 4.6-6GHz LNA in 0.13μm Floating-Body SOI CMOS |
url | http://sfxeu10.hosted.exlibrisgroup.com/loughborough?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-22T17%3A15%3A38IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_CHZPO&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=A%200.6dB%20NF,%2012dBm%20IIP3,%204.6-6GHz%20LNA%20in%200.13%CE%BCm%20Floating-Body%20SOI%20CMOS&rft.btitle=2020%20IEEE%2063rd%20International%20Midwest%20Symposium%20on%20Circuits%20and%20Systems%20(MWSCAS)&rft.au=Jha,%20Amit&rft.date=2020-08&rft.spage=121&rft.epage=124&rft.pages=121-124&rft.eissn=1558-3899&rft_id=info:doi/10.1109/MWSCAS48704.2020.9184432&rft.eisbn=1728180589&rft.eisbn_list=9781728180588&rft_dat=%3Cieee_CHZPO%3E9184432%3C/ieee_CHZPO%3E%3Cgrp_id%3Ecdi_FETCH-LOGICAL-i133t-157f6282c6af47244927d1ef219b8f998d8c2431017617b7b074a3970d9880da3%3C/grp_id%3E%3Coa%3E%3C/oa%3E%3Curl%3E%3C/url%3E&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=9184432&rfr_iscdi=true |