Analytical Characterization of CM and DM Performance of Three-Phase Voltage-Source Inverters Under Various PWM Patterns

The need for analytical models and tools to investigate common-mode (CM) and differential-mode (DM) signals in motor drive systems is evident in previous literature, which focuses on simulations and experiments. In this article, an analytical model of CM voltage (CMV) for various pulsewidth modulati...

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Bibliographic Details
Published in:IEEE transactions on power electronics 2021-04, Vol.36 (4), p.4091-4104
Main Authors: Huang, Yang, Walden, Jared, Foote, Andrew, Bai, Hua, Lu, Dingguo, Jin, Fanning, Cheng, Bing
Format: Article
Language:English
Subjects:
Algorithms
Analytical models
Common-mode (CM) voltage
Control algorithms
control bandwidth (CBW)
Control theory
double Fourier integral (DFI) analysis
Electric potential
Field programmable gate arrays
field-programmable gate array (FPGA)
Frequency modulation
Harmonic analysis
Inverters
Mathematical analysis
Mathematical models
permanent magnet synchronous motor (PMSM)
Pulse duration modulation
SiC
Space vector pulse width modulation
Switching
Voltage
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Summary:The need for analytical models and tools to investigate common-mode (CM) and differential-mode (DM) signals in motor drive systems is evident in previous literature, which focuses on simulations and experiments. In this article, an analytical model of CM voltage (CMV) for various pulsewidth modulation (PWM) schemes is presented as a double Fourier integral (DFI) and the DM current (DMI) is described by mathematical equations. The model is applied to different modulation schemes such as space vector PWM, two types of discontinuous PWM, and active zero state PWM (AZSPWM) for two-level and three-level multiphase inverters. The impact of these four modulation schemes on the CMV and DMI is comprehensively compared across varying modulation indices. The DFI model shows that while AZSPWM has the lowest CMV around the switching frequency, it has increased sideband CMV. However, it still yields the best total CMV reduction overall. An SiC inverter is built to experimentally validate the analytical model with a range of switching frequencies of 10-40 kHz. In this system, a high-resolution field-programmable gate array (FPGA) is used to implement the control algorithm and assess the impact of control bandwidth on CMV and DMI.
ISSN:0885-8993
1941-0107
DOI:10.1109/TPEL.2020.3024836