Parasitic Resistance Influence on High Resolution Digitally Programmable Potentiometers Linearity

This paper describes the effect that parasitic resistances have on the accuracy of a high resolution digitally programmable potentiometer that is based on a multistage architecture. Experimental results available from silicon implementation in a 0.18µm EEPROM process of a nonvolatile 8-bit resolutio...

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Bibliographic Details
Main Authors: Ilie Chiranu, Giorgiana-Catalina, Tudoran, Cristian, Brezeanu, Gheorghe
Format: Conference Proceeding
Language:English
Subjects:
digitally programmable potentiometer
DNL
Electrical resistance measurement
high resolution
INL
Layout
Linearity
Metals
multistage architecture
parasitic resistance
Potentiometers
Resistance
Wires
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Summary:This paper describes the effect that parasitic resistances have on the accuracy of a high resolution digitally programmable potentiometer that is based on a multistage architecture. Experimental results available from silicon implementation in a 0.18µm EEPROM process of a nonvolatile 8-bit resolution digital potentiometer show a maximum value of about 0.25LSB for both non-linearity errors (INL and DNL). Unusual transitions found in the measured INL waveform, but also unexpected spikes in the measured DNL waveform were confirmed through simulations to be the cause of a parasitical resistance introduced by a long metal wire connection between two unit resistors in the wiper array layout.
ISSN:2377-0678
DOI:10.1109/CAS50358.2020.9268041