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Electrical and Reliability Characteristics of FinFETs With High-k Gate Stack and Plasma Treatments

Effects of high- {k} gate stacks and plasma treatments on electrical and reliability characteristics of FinFET were comprehensively studied in this work. A higher ON-current, higher ON-/OFF-current ratio, smaller subthreshold swing (S.S.), lower gate leakage current, and better reliability characte...

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Bibliographic Details
Published in:IEEE transactions on electron devices 2021-01, Vol.68 (1), p.4-9
Main Authors: Li, Yan-Lin, Chang-Liao, Kuei-Shu, Li, Chen-Chien, Huang, Chin-Hsiu, Tsai, Shang-Fu, Li, Cheng-Yuan, Hong, Zi-Qin, Fang, Hsin-Kai
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Language:English
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Summary:Effects of high- {k} gate stacks and plasma treatments on electrical and reliability characteristics of FinFET were comprehensively studied in this work. A higher ON-current, higher ON-/OFF-current ratio, smaller subthreshold swing (S.S.), lower gate leakage current, and better reliability characteristics in FinFETs are simultaneously achieved by a HfO 2 /ZrO 2 /HfO 2 gate stack. The improvement can be attributed to its higher {k} -value, fewer oxide traps, and oxygen vacancy in gate stack. A higher ON-current of FinFET can be obtained with an F-based plasma treatment, which, however, also induces a larger gate leakage current. A plasma treatment with F- and N-based ambient on gate stack is shown to obtain a higher ON-current and acceptable gate leakage in FinFET. Furthermore, a larger ON-current, higher ON-/ OFF-current ratio, and a smaller S.S. in FinFET can be achieved with a TiO 2 stacked gate dielectric.
ISSN:0018-9383
1557-9646
DOI:10.1109/TED.2020.3038364