A pulse-tuned charge controlling scheme for uniform main and reference bitline voltage generation on ITIC FeRAM

In order to improve cell array efficiency and reference voltage characteristics of ITlC FeRAM, two key techniques are proposed in this paper. 1) Cell operation scheme with pulse-tuned signals on wordline and plateline for achieving uniform bitline levels in short time and 2) reference voltage genera...

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Bibliographic Details
Main Authors: Hee-Bok Kang, Hun-Woo Kye, Duck-Ju Kim, Geun-Il Lee, Je-Hoon Park, Jae-Kyung Wee, Seaung-Suk Lee, Suk-Kyoung Hong, Nam-Soo Kang, Jin-Yong Chung
Format: Conference Proceeding
Language:English
Subjects:
Character generation
Ferroelectric films
Ferroelectric materials
Nonvolatile memory
Pulse generation
Random access memory
Signal generators
Temperature control
Temperature sensors
Voltage control
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Summary:In order to improve cell array efficiency and reference voltage characteristics of ITlC FeRAM, two key techniques are proposed in this paper. 1) Cell operation scheme with pulse-tuned signals on wordline and plateline for achieving uniform bitline levels in short time and 2) reference voltage generation scheme using dual pulse control for reference voltage to track variable bitline sensing voltage in wide range of operation voltage and temperature. 2Mb ITlC FeRAM in unit block of 512 rows by 256 columns cell array with 0.35pm design rule are implemented. The optimized uniform bitline sensing voltage and reference voltage are achieved at the condition of the first wordline pulse signal of 3011s and the reference dual pulse signal time of 30-4011s at 3V in room temperature.
DOI:10.1109/VLSIC.2001.934215