Sub-quarter micron Si-gate CMOS with ZrO/sub 2/ gate dielectric

MOSFETs with a zirconium dioxide (ZrO/sub 2/) gate dielectric and poly-silicon gate were fabricated using a low temperature CMOS process. Well-behaved transistor characteristics were obtained for devices with sizes of 14 /spl mu/m/spl times/1.4 /spl mu/m or smaller. Devices 14 /spl mu/m/spl times/14...

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Main Authors: Hobbs, C., Dip, L., Reid, K., Gilmer, D., Hegde, R., Ma, T., Taylor, B., Cheng, B., Samavedam, S., Tseng, H., Weddington, D., Huang, F., Farber, D., Schippers, M., Rendon, M., Prabhu, L., Rai, R., Bagchi, S., Conner, J., Backer, S., Dumbuya, F., Locke, J., Workman, D., Tobin, P.
Format: Conference Proceeding
Language:English
Subjects:
Annealing
CMOS process
Dielectric materials
Dielectric substrates
Leakage current
MOSFETs
Permittivity
Silicon
Temperature
Zirconium
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Summary:MOSFETs with a zirconium dioxide (ZrO/sub 2/) gate dielectric and poly-silicon gate were fabricated using a low temperature CMOS process. Well-behaved transistor characteristics were obtained for devices with sizes of 14 /spl mu/m/spl times/1.4 /spl mu/m or smaller. Devices 14 /spl mu/m/spl times/14 /spl mu/m or larger were found to be nonfunctional due to the formation of Zr-silicide at the polySi-gate/Zr0/sub 2/ interface. In this paper, we present results on the electrical and physical characterization.
ISSN:1524-766X
2690-8174
DOI:10.1109/VTSA.2001.934520