Reliability-Conscious MOSFET Compact Modeling with Focus on the Defect-Screening Effect of Hot-Carrier Injection

Accurate prediction of device aging plays a vital role in the circuit design of advanced-node CMOS technologies. In particular, hot-carrier induced aging is so complicated that its modeling is often significantly simplified, with focus limited to digital circuits. We present here a novel reliability...

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Bibliographic Details
Main Authors: Vyas, Pratik B., Pimparkar, Ninad, Tu, Robert, Arfaoui, Wafa, Bossu, Germain, Siddabathula, Mahesh, Lehmann, Steffen, Goo, Jung-Suk, Icel, Ali B.
Format: Conference Proceeding
Language:English
Subjects:
Aging
aging simulation
CMOS
Data models
defects
HCI
hot carrier degradation
Integrated circuit modeling
Integrated circuit reliability
MOSFET
Reliability
Robustness
Semiconductor device modeling
SPICE model
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Summary:Accurate prediction of device aging plays a vital role in the circuit design of advanced-node CMOS technologies. In particular, hot-carrier induced aging is so complicated that its modeling is often significantly simplified, with focus limited to digital circuits. We present here a novel reliability-aware compact modeling method that can accurately capture the full post-stress I-V characteristics of the MOSFET, taking into account the impact of drain depletion region on induced defects.
ISSN:1938-1891
DOI:10.1109/IRPS46558.2021.9405197